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1、1AnefficientFPGA-baseddynamicpartialreconfigurationdesignflowandenvironmentforimageandsignalprocessingIPcores OriginalResearchArticleSignalProcessing:ImageCommunication,Volume25,Issue5,June2010,Pages377-387B.Krill,A.Ahmad,A.Amira,H.Rabah Closepreview
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4、 Relatedreferenceworkarticles AbstractAbstract
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6、ReferencesReferencesAbstractThispaperdescribesadynamicpartialreconfiguration(DPR)designflowandenvironmentforimageandsignalprocessingalgorithmsusedinadaptiveapplications.Basedontheevaluationoftheex
7、istingDPRdesignflow,importantfeaturessuchasoverallflexibility,applicationandstandardisedinterfaces,hostapplicationsandDPRarea/sizeplacementhavebeentakenintoconsiderationintheproposeddesignflowandenvironment.Threeintellectualproperty(IP)coresusedinpre-processingandtransformbl
8、ocksofcompressionsystemsincludingcolourspaceconversion(CSC),two-dimensionalbiorthogonaldiscretewavelettransform(2-DDBWT)andthree-dimensionalHaarwavelettransform(3-DHWT)havebeenselectedtovalidatetheproposedDPRdesignflowandenvironment.Resultsobtainedrevealthattheproposedenviro
9、nmenthasabettersolutionproviding:ascriptableprogramtoestablishthecommunicationbetweenthefieldprogrammablegatearray(FPGA)withIPcoresandtheirhostapplication,powerconsumptionestimationforpartialreconfigurationareaandautomaticgenerationofthepartialandinitialbitstreams.Thedesigne
10、xplorationofferedbytheproposedDPRenvironmentallowsthegenerationofefficientIPcoreswithoptimisedarea/speedratios.Analysisofthebitstreamsizeanddynamicpowerconsumptionforbothstaticandreconfigurableareasisalsopresentedinthispaper.Purchase$31.50ArticleOutline1.Introduction2.Relate
11、dwork2.1.DPRdesignflowandenvironment2.2.IPcoresinimageandsignalprocessingforadaptiveapplicationsusingDPR3.ProposedDPRdesignflowandenvironment3.1.Designflow3.1.1.DPRframeworkflow4.Casestudy:IPcoresforimageandsignalprocessingadaptiveapplications4.1.Overviewofanadaptiveimageand
12、signalprocessingapplications4.2.Proposedsystemarchitecture4.2.1.Staticarea4
