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1、IEEEJOURNALOFSOLID-STATECIRCUITS,VOL.31,NO.5,MAY1996149A1.2GHzCMOSDual-ModulusPrescalerUsingNewDynamicD-TypeFlip-FlopsByungsooChang,JoonbaePark,andWonchanKimAbstract-A1.2GHzdual-modulusprescalerICfabricatedwith0.8pmCMOStechnologyispresentedinthispaper.Thedual-moduluspres
2、calerincludesasynchronouscounter(di-DQvide-by-415)andanasynchronouscounter(divide-by-32).ADFF-3newdynamicD-flip-flop(DFF)isdevelopedforhigh-speedsyn-CLKQBIchronouscounter.Themaximumoperatingfrequencyof1.22GHzwithpowerconsumptionof25.5mWhasbeenmeasuredat5Vsupplyvoltage.I.
3、INTRODUCTIONI,IAHIGH-SPEEDprescalerICisessentialforwide-bandfrequencysynthesizersemployingthepulseswallow~-jF~F/F~Flmethod.Inthepulseswallowphase-lockedloop(PLL),thefast-varyingoutputofvoltage-controlledoscillator(VCO)isfedtotheprescalerdirectly.Accordingly,VCOFig.1.Bloc
4、kdiagramofthedual-modulusprescaler.andprescalerbecomelimitingfactorsindeterminingtheoperatingspeedofthePLL.Aprescaleroperatingatsev-consumptionaswellasthepropagationdelay.Themea-eralhundredmegahertzorabovewastraditionallybuiltsuredmaximumoperatingfrequencyandpowerconsump
5、-withSi-bipolarorGaAstechnology[l],[2].However,tionoftheprescalerare1.22GHzand25.5mWatthewiththescalingdownofMOStransistorsintheirfeaturesupplyvoltageof5V.size,CMOSprescalerIC’sandfrequencydividersoper-atingabovegigahertzrangehavebeenintroducedinpre-viousworks[3]-[5].11.
6、CIRCUITDESIGNTypically,adual-modulusprescalerisconstructedwithFig.1showsaschematicofthedesignedprescalerICtwoparts-asynchronouscounterandanasynchronousinthispaper.ItconsistsofthreeDFF’s,fivetoggle-flip-counter-toreducethenumberofflip-flopsoperatingatflops(TFF’s),inputand
7、outputcircuits,andseveralgates.highfrequencyandthepowerconsumption.Inthistwo-TheDFF’sandtheNANDgatesformadivide-by-4/5stageapproach,thesynchronouscounteristhecriticalpartcounter,andthechainedTFF’sformadivide-by-32indeterminingthespeedofaprescaler.Theoptimizationcounter.T
8、hefractionaldivisionratioisselectedaccord-ofD-flip-flop(DFF’s)inthesynchronouscounterises-ingtoamodesig
