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1、WhatEveryProgrammerShouldKnowAboutMemoryUlrichDrepperRedHat,Inc.drepper@redhat.comNovember21,2007AbstractAsCPUcoresbecomebothfasterandmorenumerous,thelimitingfactorformostprogramsisnow,andwillbeforsometime,memoryaccess.Hardwaredesignershavecomeupwithevermoresophisti
2、catedmemoryhandlingandaccelerationtechniques–suchasCPUcaches–butthesecannotworkoptimallywithoutsomehelpfromtheprogrammer.Unfortunately,neitherthestructurenorthecostofusingthememorysubsystemofacomputerorthecachesonCPUsiswellunderstoodbymostprogrammers.Thispaperexplai
3、nsthestructureofmemorysubsys-temsinuseonmoderncommodityhardware,illustratingwhyCPUcachesweredeveloped,howtheywork,andwhatprogramsshoulddotoachieveoptimalperformancebyutilizingthem.1Introductiondaythesechangesmainlycomeinthefollowingforms:Intheearlydayscomputerswerem
4、uchsimpler.Thevar-•RAMhardwaredesign(speedandparallelism).iouscomponentsofasystem,suchastheCPU,memory,massstorage,andnetworkinterfaces,weredevelopedto-•Memorycontrollerdesigns.getherand,asaresult,werequitebalancedintheirper-•CPUcaches.formance.Forexample,thememoryan
5、dnetworkinter-faceswerenot(much)fasterthantheCPUatproviding•Directmemoryaccess(DMA)fordevices.data.Thissituationchangedoncethebasicstructureofcom-Forthemostpart,thisdocumentwilldealwithCPUputersstabilizedandhardwaredevelopersconcentratedcachesandsomeeffectsofmemoryc
6、ontrollerdesign.onoptimizingindividualsubsystems.Suddenlytheper-Intheprocessofexploringthesetopics,wewillexploreformanceofsomecomponentsofthecomputerfellsig-DMAandbringitintothelargerpicture.However,wenificantlybehindandbottlenecksdeveloped.Thiswaswillstartwithanover
7、viewofthedesignfortoday’scom-especiallytrueformassstorageandmemorysubsystemsmodityhardware.Thisisaprerequisitetounderstand-which,forcostreasons,improvedmoreslowlyrelativeingtheproblemsandthelimitationsofefficientlyus-toothercomponents.ingmemorysubsystems.Wewillalsole
8、arnabout,insomedetail,thedifferenttypesofRAMandillustrateTheslownessofmassstoragehasmostlybeendealtwithwhythesedifferencesstillexist.using
