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ID:34819230
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页数:5页
时间:2019-03-11
《LNA Design Uses Series Feedback to Achieve Simultaneous Low Input VSWR and Low Noise .pdf》由会员上传分享,免费在线阅读,更多相关内容在学术论文-天天文库。
1、LNADesignLNADesignUsesSeriesFeedbacktoAchieveSimultaneousLowInputVSWRandLowNoiseByDaleD.HenkesSonyPMCAhenoisefigureofaTsinglestagetran-ZsourceZinZoutZloadsistoramplifierisafunctionoftheimped-anceappliedtotheinputZgterminalsofthetransis-Transistor/InputOutputtor.Thisimpedance,Two-PortÇmatchingmatc
2、hingZLcalledthesourceimped-Ènetwork[S11S12]networkance,isshowninFigureS21S221asZsource.TypicallythesourceimpedancethatproducesaconjugateGS,GOptGinGoutGLmatchtotheinputim-pedanceofthetransistor(Zin)isnotthesame■Figure1.Thegeneralizedanalyticalformofthelownoiseamplifier.impedanceaswouldberequiredto
3、produceaminimumnoisefigurefortheamplifier.TheoverallsystemperformanceisprobablynotTherefore,theproblemexiststhattheinputsubstantiallyaffectedbythemismatch.ThismatchingnetworkcanbetunedforlowVSWRconfigurationisshownatthetopofFigure2.(conjugatematch)orlownoisefigurebutnotInmanyfullyduplexsystemsthe
4、transmit-bothsimultaneously.Thisarticledescribesafeedbacktechniqueforsimultaneouslyachiev-AntennainglowinputVSWRandlownoisefigureinLNAsemployingFieldEffectTransistors(FETs).Itwillbeshownthatin-bandstabilityisalsoimprovedasanadditionalbenefitoftheDownconverter/LNAnegativefeedbackemployed.RestofRec
5、eiverAlthoughthetechniquepresentedherecanbeappliedoverawiderangeofRFandAntennamicrowavefrequencies,allnumericalresultspresentedwillbeforanLNAdesignedforoper-ationinthePCScellularbandat1.9GHz.AsshowninFigure2,theimportanceofLNAFilter/Downconverter/LNAinputmatchingdependsontheapplication.InaDuplexe
6、rRestofReceiverreceiveonlysystem,suchasasatellitereceiver,theLNAmightbeconnecteddirectlytoanantenna.TheLNAinputmatchistypically■Figure2.TwoLNAimplementations.Top:Systemdesignedtoachieveminimumnoisefigure,lesssensitivetoLNAinputmatch.Bottom:Systemacceptingarelativelylargeinputmismatch.moresensitiv
7、etoLNAinputmatch.26AppliedMicrowave&WirelessLNADesignRgRggVmcGDDGD++IgVcgVVC–mcGÞ–cVgsCgsRdsCdsgSZinSSSLsIs=Ig+gmVc■Figure3.FETsymbol(left)andsimplifiedFETmodel(right).■Figure4.FETmodelwithexternalsourceinductance.ting
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