基于RapidIO系统互连协议的逻辑设计与验证

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1、西南交通大学硕士学位论文基于RapidlO系统互连协议的逻辑设计与验证姓名：吴强申请学位级别：硕士专业：信号与信息处理指导教师：蒋朝根20091201西南交通大学硕士研究生学位论文第11页AbstractDuetotherapiddeve1opmentofthecommunicationsandnetworktechnology,variousEmbeddedsystemshavehigherrequirementfortransferrate0fdata1ndeV■1ce•Trad•1t•1ona1h•1erarchica1sharedbusarch•1tecturehasa1rea

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4、SerialRapidlO)wh■1chsUPportsthreeBaud•1nc1ud•1ng125GIIz、2•5GIIz、3.125GIIzadpersistentFu11—dUp1eXdatabandw•1dthfrom4Gbpst018Gbps,isimportantpoI0fthi§B§BgFfi-assimp11f1edthefunct10n0fL0gicandTransp0rtLayerbasedon■1n—depthstudyf0rSer1a1Rap■1d10interc0nnect:南t0c01three.t•.1erarchitecturesuch勰L0gicLa

5、yer,Trajjsp0rtLayer•Thekeyresearch•1sFPGA(F■16丄tdePArr(。「禺59孚禺gPclfes1gnf0rL0g1candTransP0rtLayer1nc1udingthefunctionssuchasaccomp1ish•1n.gencapsu1ati0nandana1ysisforavarietyHsdervirespe0srneS勒easCae£ketjS,1nterfaceseqU12ncechangeofeach1ayerthefa■1rpo11■1nsf0rmu1tip1ychanne1sandma■1ntenance0feac

6、h1ayei“egisters•Veri1ogprogra1mofthedes1gnhasbeenofferedtoRTLsimu1ati0nandverif•1cationbybuiHinu?1e2FfuRi0na1simu1ati0nandVerif■1cat■1onenvironmentbasedonFPGA•Fina11yana1yZ•1ngfromt•1m•1ngsim.u1ationwavefQe^rBincdinie0^1siUvHQdnlmQWlii苗ifc&gnofth1s10gicandtransPort1ayersa11haveg0odibbPerf0rmance

7、0nf1ex■11■1ty，re1•1ai1ityaDtdr6&Kap)8dll(Ssiobtic(1rietoy)?e8mTbddGl8dliilth)€vpb8yGdntiOabtBonandnetworksystem・Keywords：systeminterconnection,SerialRapidlO,1ogicandtra輕gLfseiRk!9!I?F0FPG人，西南交通大学学位论文版权使用授权书本学位论文作者完全了解学校有关保留、