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1、US007099182B2(12)UnitedStatesPatent(10)PatentN0.:US7,099,182B2Ohtakeeta1.(45)DateofPatent:Aug.29,2006(54)STATICRANDOMACCESSMEMORYANDOTHERPUBLICATIONSPSEUDO-STATICNOISEMARGINMEASURINGMETHOD“TheImpactofIntrinsicDeviceFluctuationsonCMOSSRAMCellStability”Bhavnagarwa
2、la,A.J.;XinghaiTang;Meindl,J.D.;SolidStateCircuits,IEEEJournalofvol.36,Issue4,Apr.2001pp.658(75)Inventors:HiroyukiOhtake,Tokyo(JP);Osamu665*Hirabayashi,Tokyo(JP)“Static-NoiseMarginAnalysisofMOSSRAMCells”Seevinck,B;List,F.J.;Lohstroh,J.;Solid-StateCircuits,IEEEJo
3、urnalofvol.22,(73)Assignee:KabushikiKaishaToshiba,Tokyo(JP)Issue5,Oct.1987pp.748-754.*“NoiseMarginandLeakageinUltra-LowLeakageSRAMCell(*)Notice:Subjecttoanydisclaimer,thetermofthisDesign”Hook,T.B.;Breitwisch,M.;Brown,J.;Cottrell,P.;patentisextendedoradjustedunde
4、r35Hoyniak,D.;ChungLam;Mann,R.;ElectronDevices,IEEEU.S.C.154(b)by76days.Transactionsonvol.49,Issue8,Aug.2002pp.1499-1501.**citedbyexaminer(21)Appl.N0.:11/022,791PrimaryExamineriRichardElms(22)Filed:Dec.28,2004AssistantExamineriEricJ.Wendler(74)Attorney,Agent,orF
5、irm4Oblon,Spivak,McClelland,(65)PriorPublicationDataMaier&Neustadt,PC.US2006/0098475A1May11,2006(57)ABSTRACT(30)ForeignApplicationPriorityDataA?rstinverterincludesa?rstloadelementanda?rstNov.5,2004(JP).............................2004-322497transistor,Whichareco
6、nnectedbetween?rstandsecondterminalsinseries,a?rstinputterminalanda?rstoutput(51)Int.Cl.terminal.AsecondinverterincludesasecondloadelementG11C11/00(2006.01)andasecondtransistor,Whichareconnectedbetweenthirdandfourthterminalsinseries,asecondinputterminalanda(52)U
7、S.Cl.................365/154;365/156;257/E27.098secondoutputterminal.A?rsttransfertransistorselectively(58)FieldofClassi?cationSearch................365/154,andelectricallyconnectsthe?rstoutputterminalanda?rst365/156;257/E27.098,E27.099bitline.Asecondtransfertra
8、nsistorselectivelyandelectriSeeapplication?leforcompletesearchhistory.callyconnectsthesecondoutputterminalandasecondbitline.WhendataarereadfromthememorycellWhich(56)R
