DDR3 Design Guide for KeyStone Devices

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1、ApplicationReportSPRABI1—November2010DDR3DesignGuideforKeyStoneDevicesHigh-PerformanceandMulticoreProcessorsAbstract/Purpose/BenefitThisdocumentprovidesimplementationinstructionsfortheDDR3interfaceincorporatedintheTexasInstruments(TI)KeystoneseriesofDSPdevices.It

2、supports1333MT/sandhighermemoryspeedsinavarietyoftopologies(refertotheDataManualforsupportedspeeds).ThisdocumentassumestheuserhasafamiliarizationwithDRAMimplementationconceptsandconstraints.Whensearchingforaparticularconfigurationrefertotheappendix,whichwillallev

3、iatetheneedforsearchingtheentiredocumentwhichcontainsallpossiblevariations.Contents1MigratingDesignsfromDDR2toDDR3(Features&Comparisons).............................61.1Topologies.............................................................................61.1.1B

4、alancedLineTopology..........................................................61.1.1.1BalancedLineTopologyIssues...........................................61.1.2FlyByTopology..................................................................71.1.2.1BalancedLineTopo

5、logyIssues...........................................71.2ECC(ErrorCorrection)...................................................................71.3DDR3Features&Improvements........................................................71.3.1ReadLeveling................

6、....................................................71.3.2WriteLeveling...................................................................81.3.3Pre-fetch.........................................................................81.3.4ZQCalibration..................

7、.................................................81.3.5ResetPinFunctionality...........................................................81.3.6AdditionalDDR2toDDR3Differences.............................................92Prerequisites...............................

8、................................................102.1HighSpeedDesigns....................................................................102.2JEDECDDR3Specific