计组实验-MIPS异常和中断处理

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1、计算机学院课程计算机组成原理MIPS异常/中断处理高小鹏北京航空航天大学计算机学院系统结构研究所提纲MIPS中断/异常支持中断/异常的数据通路软硬件配合的中断响应机制CP0设计北京航空航天大学计算机学院ExceptionsandInterrupts•“Unexpected”eventsrequiringchangeinflowofcontrol–DifferentISAsusethetermsdifferently•Exception–AriseswithintheCPU(e.g.undefinedopcode,overflow,syscall,TLBMiss)•Interrupt–Fr

2、omanexternalI/Ocontroller•Dealingwiththesewithoutsacrificingperformanceisdifficult!7/31/2012Summer2012--Lecture#253HandlingExceptions(1/2)•InMIPS,exceptionsmanagedbyaSystemControlCoprocessor(CP0)•SavePCofoffending(orinterrupted)instruction–InMIPS:saveinspecialregistercalledExceptionProgramCounter

3、(EPC)异常返回地址寄存器•Saveindicationoftheproblem–InMIPS:savedinspecialregistercalledCauseregister原因寄存器–Insimpleimplementation,mightonlyneed1‐bit(0forundefinedopcode,1foroverflow)•Jumptoexceptionhandlercodeataddress0x80000180(或者0xBFC000380，不同模式地址不同)7/31/2012Summer2012--Lecture#254HandlingExceptions(2/2)•

4、Operatingsystemisalsonotified–Cankillprogram(e.g.segfault)–ForI/Odevicerequestorsyscall,oftenswitchtoanotherprocessinmeantime•ThisiswhathappensonaTLBmissesandpagefaults7/31/2012Summer2012--Lecture#255ExceptionProperties•Re‐startableexceptions–Pipelinecanflushtheinstruction–Handlerexecutes,thenret

5、urnstotheinstruction•Re‐fetchedandexecutedfromscratch•PC+4savedinEPCregister–Identifiescausinginstruction–PC+4becauseitistheavailablesignalinapipelinedimplementation•Handlermustadjustthisvaluetogetrightaddress7/31/2012Summer2012--Lecture#256HandlerActions•ReadCauseregister,andtransfertorelevantha

6、ndler•OSdeterminesactionrequired:–Ifrestartableexception,takecorrectiveactionandthenuseEPCtoreturntoprogram–Otherwise,terminateprogramandreporterrorusingEPC,Causeregister,etc.(e.g.ourbestfriendthesegfault)7/31/2012Summer2012--Lecture#257I/OInterrupt•AnI/Ointerruptislikeanexceptionexcept:–AnI/Oint

7、erruptis“asynchronous”–Moreinformationneedstobeconveyed•“Asynchronous”withrespecttoinstructionexecution:–I/Ointerruptisnotassociatedwithanyinstruction,butitcanhappeninthemiddleofanygiveninstruction–I/Ointerruptdoesnotp