资源描述：
《实验二加法器的设计与仿真小强》由会员上传分享，免费在线阅读，更多相关内容在工程资料-天天文库。
1、实验二加法器的设计与仿真一、实验内容1.用VHDL语言设计全加器;2.利用设计的全加器组成串行加法器；3.用VHDL语言设计并行加法器。二、VHDL程序1.全加器libraryieee;useieee.std」ogic_1164.all;entityf_adderisport(x.^cin:instdjogic;s,cout:outstdjogic);endf_adder;architecturebhvoff_adderisbegins<=xxoryxorcin;cout<=(xandy)or(xandcin)or(yandcin);endbhv;2.四位串行加法器libraryieee;us
2、eieee.std_logic_1164.all;entityffadderisport(x,y:instd」ogic_vector(3downto0);cin:instdjogic;s:outstd」ogic_vector(3downto0);cout:outstdjogic);endffadder;architecturebhvofffadderissignaloutl,out2,out3:stdjogic;componentf_adderisport(x,y,cin:instdjogic;s,cout:outstdjogic);endcomponentf_adder;beginul:f_
3、adderportmap(x(0),y(0),cin,s(0),outl);u2:f_adderportmap(x(l),y(l),outl,s(l),out2);u3:f_adderportmap(x(2),y(2),out2,s(2),out3);u4:f_adderportmap(x(3)zy(3)/out3,s(3)/cout);endbhv;1.74283：4位先行进位全加器(4-BitFullAdder)libraryieee;useieee.stdjogic_1164.all;entityfulladderisport(x;y:instdjogic_vector(3downto0
4、);cin:instdjogic;s:outstdjogic_vector(3downto0);coutoutstdjogic);endfulladder;architecturebhvoffulladderissignalc:std_togic.vector(4downto0);signalg,p:stdjogic_vector(3downto0);beging(0)<=x(0)andy(0);g(l)<=x(l)andy(l);g(2)<=x(2)andy(2);g⑶<=x(3)andy⑶;p(0)<=x(0)ory(0);p(l)<=x(l)ory(l)；p(2)v二x(2)ory(2)
5、;p(3)<=x(3)ory⑶;c(0)<=cin;c⑴v二g(0)or(p(0)andc(0));c(2)<=g(l)or(p(l)andg(0))or(p(l)andp(0)andc(0));c(3)<=g(2)or(p(2)andg⑴)or(p(2)andp(l)andg(0))or(p(2)andp(l)andp(0)andc(0));c(4)<=g(3)or(p(3)andg(2))or(p(3)andp(2)andg(l))or(p(3)andp(2)andp(l)andg(0))or(p⑶andp(2)andp(l)andp(0)andc(0));s(0)v二x(0)xory(0
6、)xorc(0);s(l)<=x(l)xory(l)xorc(l);s(2)v=x(2)xory(2)xorc(2);s(3)v=x(3)xory(3)xorc(3);cout<=c(4);endbhv;三、实验结果均为无延迟下测得的结果1.全加器2.四位串行加法器NameVAir1000ns200Ont3000ns乙们°仏5000ns6C07000ns8000nsqH31'1111—u^-cin02cout1丁LJITlJ"»»M(30
7、D15oX3X6X«X12X15Y2X5XeX11XW1jt4X7：(10X13X0X3X6)[9X12K0
8、D74X5X67XBX9)(WX11X12X1
9、3X14：(15X0X1v»s(30
10、D64和8)(11I15乂2何(6J10斤啊1X5何何12X0心巩711丫代何]2:C6"何口74283：，他先行进位全加器(4-BitFullAdder)NameValue:100One2000ns3000ns4000r»5000ns6000ns700.0w8000nsu^-cin10cout0」L」L_TL■v*X
11、30
12、D4oX2X4X6X8rX1
