[J.Bergeron]Verification Methodology Manual for SystemVerilog.pdf

[J.Bergeron]Verification Methodology Manual for SystemVerilog.pdf

ID:34750248

大小:2.37 MB

页数:514页

时间:2019-03-10

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1、VerificationMethodologyManualforSystemVerilogVerificationMethodologyManualforSystemVerilogbyJanickBergeronEduardCernyAlanHunterAndrewNightingaleJanickBergeron,Synopsys,Inc.EduardCerny,Synopsys,Inc.AndrewNightingale,ARM,Ltd.AlanHunter,ARM,Ltd.VerificationmethodologymanualforSystemVerilog/byJanickBer

2、geron…[etal.].p.cm.Includesbibliographicalreferencesandindex.ISBN-13:978-0-387-25538-5(alk.paper)ISBN-10:0-387-25538-9(alk.paper)ISBN-10:0-387-25556-7(e-book)1.Verilog(Computerhardwaredescriptionlanguage)2.Integratedcircuits--Verification.I.Bergeron,Janick.TK7885.7V442005621.39’2--dc222005051724Cov

3、er:DiephotographoftheARM926EJ-S™PrimeXsys™PlatformDevelopmentChip¬2005ARMLtd.ARMisaregisteredtrademarkandARM926EJ-SandPrimeXsysaretrademarksofARMLimited.“ARM”isusedtorepresentARMHoldingsplc;itsoperatingcompanyARMLimited;andtheregionalsubsidiariesARMINC.;ARMKK;ARMKoreaLtd.;ARMTaiwan;ARMFranceSAS;ARM

4、Consulting(Shanghai)Co.Ltd.;ARMBelgiumN.V.;AXYSDesignAutomationInc.;AXYSGmbH;ARMEmbeddedTechnologiesPvt.Ltd.;andARMPhysicalIP,Inc.SynopsysisaregisteredtrademarkofSynopsys,Inc.¬2006Synopsys,Inc.andARMLimitedAllrightsreserved.Thisworkmaynotbetranslatedorcopiedinwholeorinpartwithoutthewrittenpermissio

5、nofthepublisher(SpringerScience+BusinessMedia,Inc.,233SpringStreet,NewYork,NY10013,USA),exceptforbriefexcerptsinconnectionwithreviewsorscholarlyanalysis.Useinconnectionwithanyformofinformationstorageandretrieval,electronicadaptation,computersoftware,orbysimilarordissimilarmethodologynowknoworhereaf

6、terdevelopedisforbidden.Theuseinthispublicationoftradenames,trademarks,servicemarksandsimilarterms,evenifthearenotidentifiedassuch,isnottobetakenasanexpressionofopinionastowhetherornottheyaresubjecttoproprietaryrights.PrintedintheUnitedStatesofAmerica.987654321SPIN11055174springeronline.comFOREWORD

7、WhenIco-authoredtheoriginaleditionoftheReuseMethodologyManualforSys-tem-on-ChipDesigns(RMM)nearlyadecadeago,designerswerefacingacrisis.Shrinkingsilicongeometryhadincreasedsystem-on-chip(SoC)capacitywellinto

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