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1、REUSEMETHODOLOGYMANUALFORSYSTEM-ON-A-CHIPDESIGNSTHIRDEDITIONTrademarkInformationSynopsysandDesignWarearearegisteredtrademarksofSynopsys,Inc.DesignCompilerisatrademarkofSynopsys,Inc.Allothertrademarksaretheexclusivepropertyoftheirrespectiveholdersandshouldbetreatedas
2、such.REUSEMETHODOLOGYMANUALFORSYSTEM-ON-A-CHIPDESIGNSTHIRDEDITIONByMichaelKeatingSynopsys,Inc.PierreBricaudSynopsys,Inc.KLUWERACADEMICPUBLISHERSNEWYORK,BOSTON,DORDRECHT,LONDON,MOSCOWeBookISBN:0-306-47640-1PrintISBN:1-4020-7141-8©2002KluwerAcademicPublishersNewYork,B
3、oston,Dordrecht,London,MoscowPrint©2002KluwerAcademicPublishersDordrechtAllrightsreservedNopartofthiseBookmaybereproducedortransmittedinanyformorbyanymeans,electronic,mechanical,recording,orotherwise,withoutwrittenconsentfromthePublisherCreatedintheUnitedStatesofAme
4、ricaVisitKluwerOnlineat:http://kluweronline.comandKluwer'seBookstoreat:http://ebooks.kluweronline.comTableofContentsForewordxiiiPrefacetotheThirdEditionxvAcknowledgementsxvii1Introduction11.1GoalsofThisManual21.1.1Assumptions31.1.2Definitions31.1.3VirtualSocketInter
5、faceAlliance41.2DesignforReuse:TheChallenge41.2.1DesignforUse51.2.2DesignforReuse51.3TheEmergingBusinessModelforReuse62TheSystem-on-ChipDesignProcess92.1ACanonicalSoCDesign92.2SystemDesignFlow112.2.1Waterfallvs.Spiral112.2.2Top-Downvs.Bottom-Up152.2.3ConstructbyCorr
6、ection152.2.4Summary16viReuseMethodologyManual2.3TheSpecificationProblem172.3.1SpecificationRequirements172.3.2TypesofSpecifications182.4TheSystemDesignProcess193System-LevelDesignIssues:RulesandTools233.1TheStandardModel233.1.1SoftIPvs.HardIP253.1.2TheRoleofFull-Cu
7、stomDesigninReuse273.2DesignforTimingClosure:LogicDesignIssues283.2.1InterfacesandTimingClosure283.2.2Synchronousvs.AsynchronousDesignStyle333.2.3Clocking353.2.4Reset363.2.5TimingExceptionsandMulticyclePaths373.3DesignforTimingClosure:PhysicalDesignIssues383.3.1Floo
8、rplanning383.3.2SynthesisStrategyandTimingBudgets393.3.3HardMacros393.3.4ClockDistribution403.4DesignforVerification:VerificationStrategy4
