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1、396IEEETRANSACTIONSONINSTRUMENTATIONANDMEASUREMENT,VOL.IM26,NO.4,DECEMBER1977DevelopingProgrammableBroad-BandCountingCircuitsforHigh-SpeedDataTransmissionandFrequencyDivisionALEXANDERPAPHITISAbstract-Throughtheadvancementofintegrated-circuit(IC)A.TheLogicFamiliestechnologynewapproachesforprogramm
2、ablecountingcircuitsaremadefeasible.Frequenciesupto1.2GHzareprogrammableInFig.1,asignalAistoggledbyadevicewithapropa-dividedbyanewbreedofMSI-countersforultra-high-frequencygationdelaytoleranceATff.AccordingtoATffasignalAD1communicationssystems.orAD2willappearattheoutputTminorTmaxnanosecondsAfterr
3、eviewing,thealreadyknownspeedenhancingtechniques,aftertheclock-signalC1hasbeenapplied.Theonlycon-anewcountingmethod(thepatentsofwhichispending)isintro-ducedtoallowhighercountingspeeds.ByusingashiftregisterandstraintappliedtoADisthatitmustappearbeforethenextsomegates,applicationsatfrequenciesuptot
4、hegigahertzregion,clocktransition,attheinputofthefollowingDflip-flop.onetotwoordersofmagnitudehigherthanconventionalpro-Bydelayingtheclock-signalC1byTmin,asindicatedinFig.grammablecounting,aremadepossible.Theprogrammable1,thecutofffrequencyofthiscircuitconfigurationisgivencountersdevelopedusethen
5、ewtechniquetoeliminatetheset-upbyfco=1/ATwhereAT-=ATff+ATC+Ts+Th-timeconstraintoftheICemployed.Thisbooststhecountingfre-quencyuptomaximumtogglefrequencyoftheIC.Thefastestoperationisobtainedbyusingaflip-floptoThemethoddescribedisideallysuitedforphase-lockedlooptoggleA(Arff).FortheMECLIIIMC1600seri
6、es,forin-(PLL)synthesizersforatleasttworeasons.First,iteliminatesstance,wethenobtain:f/,=303.0MHz.muchoftheprescalingrequiredbyslowercounters.Second,ital-ThecircuitconfigurationinFig.1waschosenasatestlows,inoppositiontopulse-swallowingtechniques,low-divisionratios,andimprovedPLLperformance.vehicl
7、eforacomparativestudyofthemostfrequentlyusedThesimplicityofthemethodandthelowpackagecountmakeitlogicfamilies.TheresultsarelistedinTableI.ComparisonsuitableforMSIandLSI.ofcolumns5and6reveaisalargediscrepancy,betweenf,,T
