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1、Cadence后端实验系列19_版图验证_AssuraIntroductiontoAssuraPhysicalVerificationAssuraPhysicalVerificationToolSuiteAssuraTaskandDataFlowAssuraInputFilesRunningAssuraDRCGraphicalUserInterfaceRunGuideLVSGraphicalUserInterfaceRunGuideRCXGraphicalUserInterfaceRunGuideDemonstr
2、ationOUTLINEIntroductiontoAssuraPhysicalVerificationAssuraPhysicalVerificationToolSuiteAssuraTaskandDataFlowAssuraInputFilesRunningAssuraDRCGraphicalUserInterfaceRunGuideLVSGraphicalUserInterfaceRunGuideRCXGraphicalUserInterfaceRunGuideDemonstrationOUTLINEAss
3、uraPhysicalVerificationToolSuiteTheAssuraverificationsuiteisoptimizedforlarge,hierarchical,repetitivedesignssuchasmemory,microprocessor,andmixed-signalcircuits.ThesoftwareupholdstheCadenceverificationtraditionofaccuracyestablishedbyitsDracula®andDiva®products.
4、TheAssuratoolsensureaccuracyandleveragethelayouthierarchyofleading-edgedesignstoprovidefasterphysicalverificationruntimes.AssuraPhysicalVerificationToolSuiteAssuraDRC–AssuraDRC(DesignRuleChecking)checksthelayoutagainstgeometricspacing,width,andotherrules.Typi
5、calchecksincludematerialspacing,enclosure,coverage,andoverlap.AssuraDRCdisplaysdesignruleviolationsgraphicallyasanadditionalgraphicslayeronthelayout,andliststhemintextfiles.AssuraLVS–AssuraLVS(LayoutVersusSchematic)comparisonextractsdevicesandconnectivityfrom
6、thelayoutaccordingtodeviceextractionrules,thencreatesalayoutnetlistaccordingtonetlistrules,thenfinallycomparesthelayoutnetlisttotheschematicnetlistaccordingtocomparisonrules.AssuraLVSdisplaysmismatchesbetweenthelayoutandtheschematicbothtextuallyandgraphically
7、.AssuraRCX–AssuraRCX(Resistance,CapacitanceandInductanceExtraction)extractsparasiticresistance,capacitance,andinductancefromthelayoutforanalysisandinputtopost-layoutsimulators.AssuraTaskandDataFlowAssuraInputFilesRun-SpecificFile(RSF)TheAssuraRSFisarequiredco
8、ntrolfileintextformatthatdirectstheAssuraDRC,LVS,orRCXrun.Itspecifiesinputdatafiles,rulefiles,run-specificoptions,andcommandstoinvokethetool.TheAssuraRSFfollowsCadenceSKILLlanguagesyntax.OptionsinanR
