数字集成电路

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1、数字集成电路门电路触发器存储器组合集成逻辑电路时序集成逻辑电路驱动和电平转换器与门和缓冲器门电路与非门和反相器1或门和与或门与或非门异或门和异或非门或非门与非门和反相器2与门和缓冲器类别品种代号四2输入与门四2输入与门（OC）四2施密特触发输入与门三3输入与门三3输入与门（OC）双4输入与门三4输入与门/与非门六2输入与门六缓冲器六缓冲器（OC）九缓冲器0810084081097001101140731521408280080814503341034405007173510359035913508100809(OC)1A1B1Y2A2B2YGNDVCC4B4A4Y3B3A3Y1234567

2、1413121110981A1B1Y2Y2A2BVSSVDD4B4A4Y3Y3B3A40811234567141312111098四2输入与门1A1B2A2B2C2YGNDVCC1C1Y3C3B3A3Y123456714131211109811101115(OC)2A2B1A1B1C1YVSSVDD3C3B3A3Y2Y2C12345671413121110984073三3输入与门1A1BNC1C1D1YGNDVCC2D2CNC2B2A2Y12345671413121110982112345671413121110981Y1A1B1C1DNCVSSVDD2Y2D2C2B2ANC4082双4

3、输入与门80812345678910201918171615141312111A1B1Y2A2B2Y3A3B3YGNDVCC6B6A6Y5B5A5Y4B4A4Y六2输入与门EN11A1Y2A2Y3A3YVSSVDDEN26A6Y5A5Y4A4Y1234567816151413121110945031450312345671413121110981A1Y2A2Y3A3YGNDVCC6A6Y5A5Y4A4Y34103412345671413121110981A1Y2A2Y3A3YGNDVCC6A6Y5A5Y4A4Y0717351035(OC)VDD1Y1A2Y2A3Y3AVSSNCEN26Y6A

4、5Y5A4Y4A123456781615141312111094050六缓冲器与非门和反相器1类别品种代号四2输入与非门四2输入与非门（OC）四2施密特触发输入与非门双2输入与非门（3S）三3输入与非门三3输入与非门（OC）双4输入与非门双4输入与非门（OC）双4施密特触发输入与非门三4施密特触发输入与非门00100040113701031003263839132409370031010402312401078003204040122213181020618与非门和反相器2类别品种代号六2输入与非门六反相器六反相器（OC）六施密特触发输入反相器六反相缓冲器八施密特触发输入反相器九反相缓冲器

5、8输入与非门12输入与非门（3S）13输入与非门04100440690510051419401060616400940104049450214502903491348046193040681341331A1B1Y2Y2A2BVSSVDD4B4A4Y3Y3B3A4011123456714131211109839(OC)1Y1A1B2Y2A2BGNDVCC4Y4B4A3Y3B3A123456714131211109801(OC)1Y1A1B2Y2A2BGNDVCC4B4Y4A3B3Y3A1234567141312111098四2输入与非门0010003703100326381A1B1Y2A2B

6、2YGNDVCC4B4A4Y3B3A3Y1234567141312111098(OC)1321A1B1Y2A2B2YGNDVCC4B4A4Y3B3A3Y12345671413121110981A1B1Y2Y2A2BVSSVDD4B4A4Y3Y3B3A40931234567141312111098四2施密特触发输入与非门NCNC1A1B1YNCVSSVDDNCNC2A2B2YNC401071234567141312111098双2输入与非门（3S）AB00011011Y1*Z*1*Z*1*Z*0040107功能表注:*要求外接上拉电阻至VDD*无上拉电阻（3S）1A1B2A2B2C2YGND

7、VCC1C1Y3C3B3A3Y123456714131211109810101012(OC)2A2B1A1B1C1YVSSVDD3C3B3A3Y2Y2C12345671413121110984023三3输入与非门1A1BNC1C1D1YGNDVCC2D2CNC2B2A2Y123456714131211109813182022(OC)40102012345671413121110981Y1A1B1