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1、JournalofVLSISignalProcessing33,247–254,2003c2003KluwerAcademicPublishers.ManufacturedinTheNetherlands.DesignofNewDSPInstructionsandTheirHardwareArchitectureforHigh-SpeedFFTJAESUNGLEEElectronicsandTelecommunicationsResearchInstitute,Daejeon305-250,KoreaMYUNGH.SUNWOO
2、SchoolofElectronicsEngineering,AjouUniversity,San5,Wonchun-Dong,Paldal-Ku,Suwon442-749,KoreaReceivedSeptember6,2001;RevisedApril8,2002;AcceptedMay15,2002Abstract.ThispaperpresentsnewDSP(DigitalSignalProcessor)instructionsandtheirhardwarearchitectureforhigh-speedFFT.T
3、heinstructionsperformnewoperationflows,whicharedifferentfromtheMAC(MultiplyandAccumulate)operationonwhichexistingDSPchipsheavilydepend.ThispaperproposestheDPU(DataProcessingUnit)supportingtheinstructionsandshowsittobetwotimesfasterthanexistingDSPchipsforFFT.Thearchite
4、cturehasbeenmodeledbytheVerilogHDLandlogicsynthesishasbeenperformedusingthe0.35µmstandardcelllibrary.Themaximumoperatingclockfrequencyisabout144.5MHzandthearchitecturewillbeemployedonanapplication-specificDSPchip.Keywords:fastFouriertransform,applicationspecificdigital
5、signalprocessor,OFDM,DMT1.Introductionavailable.Inparticular,twomodulationtechniquesarenecessarytoachievehigh-speeddatatransmissioninWiththerapidprogressofcommunicationtech-narrowbands,namelyOFDM(OrthogonalFrequencynologies,variouscommunicationsystemshavebeenDivision
6、Multiplexing)andDMT(DiscreteMulti-developed,suchasVDSL(Very-high-data-rateDigitalTone)[2],whichneedtoperformseveralhundredorSubscriberLine),cablemodem,andIMT-2000(Inter-thousandpointsofFFTwithinafewdozenµs.Com-nationalMobileTelecommunications-2000)basedonmercialDSPch
7、ipshavenotreachedtherequirementseitherWCDMA(WidebandCodeDivisionMultipleyet[3,4].Access)orCDMA2000.Oncetechnologiesandalgo-Tomeethigh-speedFFTcomputationsandtomin-rithmshavebeenthoroughlyfixedandverified,customimizethememoryrequirement,thispaperproposesASIC(Application
8、-SpecificIntegratedCircuit)chipsapplication-specificinstructionsandtheirhardwarehavebeenimplementedtoreducethecost,size,andarchitectu
