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1、FaultTolerantComputerArchitectureiiiSynthesisLecturesonComputerChapterTitlehereArchitectureKratosEditorMarkD.Hill,UniversityofWisconsin,MadisonSynthesisLecturesonComputerArchitecturepublishes50to150pagepublicationsontopicspertainingtothescienceandartofdesigning,analyzing,selectingandinterconnec
2、tinghardwarecomponentstocreatecomputersthatmeetfunctional,performanceandcostgoals.FaultTolerantComputerArchitectureDanielSorin2009TheDatacenterasaComputer:AnIntroductiontotheDesignofWarehouse-ScaleMachinesLuizAndréBarrosoandUrsHölzle2009ComputerArchitectureTechniquesforPower-EfficiencyStefanosK
3、axirasandMargaretMartonosi2008ChipMutiprocessorArchitecture:TechniquestoImproveThroughputandLatencyKunleOlukotun,LanceHammond,JamesLaudon2007TransactionalMemoryJamesR.Larus,RaviRajwar2007QuantumComputingforComputerArchitectsTzvetanS.Metodi,FredericT.Chong2006Copyright©2009byMorgan&ClaypoolAllri
4、ghtsreserved.Nopartofthispublicationmaybereproduced,storedinaretrievalsystem,ortransmittedinanyformorbyanymeans—electronic,mechanical,photocopy,recording,oranyotherexceptforbriefquotationsinprintedreviews,withoutthepriorpermissionofthepublisher.FaultTolerantComputerArchitectureDanielSorinwww.mo
5、rganclaypool.comISBN:9781598299533paperbackISBN:9781598299540ebookDOI:10.2200/S00192ED1V01Y200904CAC005APublicationintheMorgan&ClaypoolPublishersseriesSYNTHESISLECTURESONCOMPUTERARCHITECTURELecture#5SeriesEditor:MarkD.Hill,UniversityofWisconsin,MadisonSeriesISSNISSN1935-3235printISSN1935-3243el
6、ectronicFaultTolerantComputerArchitectureDanielJ.SorinDukeUniversitySYNTHESISLECTURESONCOMPUTERARCHITECTURE#5viABSTRACTFormanyyears,mostcomputerarchitectshavepursuedoneprimarygoal:performance.Architectshavetranslatedtheever-increasingabundanceofever-fastertransistorsprovidedbyMoore’slawintorema
7、rkableincreasesinperformance.Recently,however,thebountyprovidedbyMoore’slawhasbeenaccompaniedbyseveralchallengesthathavearisenasdeviceshavebecomesmaller,includ-ingadecreaseindependabilityduetophysicalfaults.Inthisbook,wefocusonthe
