第5章 逻辑仿真与时序分析

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1、1deledttingalltely.iccell.tion.），ogiccell.Seionalsimula（或电流。。,whichsetsdelaystoa：：：：boxeswithinputsandoutputs.doesnotrequirethecreationofasetof一般假设信号只出现在几个有限的逻辑，，否则会使模拟器太复杂，否则不能正确反映硬件的性能ignorescomponent’stimingandincludesit’s:modelslargepiecesofasystemasblacku

2、nit-delaysimulationfixedvalue(forexample,1ns).Onceabehavioralorfunctionalsimulationpredictsthatasystemworkscorrectly,thenextstepistocheckthetimingperformance.test(orstimulus)vectorstocomputethedelaytimesforeachpath.:beusedtocheckthetimingperformanceofanAtthisp

3、ointasystemispartitionedintoASICs,timingsimulationisperformedforeachASICseparaASIC.Inagate-levelsimulatoralogicgateorlog(NAND,NOR,andsoon)istreatedasablackboxmobyafunctionwhosevariablesaretheinputsignalsThefunctionmayalsomodelthedelaythroughthelthedelaystounit

4、valueistheequivalentoffunct）逻辑态不能太多）逻辑态不能太少逻辑系统数字信号变化时实际上也是连续变化的电压。这几个逻辑状态的选择原则是1201XZzeroonezerooronezero,one,orneitherhighimpedanceunknownstatictiminganalysis:4.2:数字模拟器为了简化处理状态上Afour-valuelogicsystemLogicstateLogiclevelLogicvaluebehavioralsimulationFunctiona

5、lsimulation:timingsimulation:gate-levelsimulation.，只能：；只有在版图uit-levelsimulationlevelsimulationofa。在版图形成以前。。，不能求出连接线的延迟逻辑模拟与时序分析:requiresmodelsoftransistors,describingpermitsdifferentpartsofanASICsimulation：：逻辑模拟与时序分析：：:modelstransistorsasswitches—onoroff.amixe

6、danalog/digitalsimulatorandprovidesmoreaccuratetimingpredictionsthangate-levelsimulation.theirnonlinearvoltageandcurrentcharacteristicsThemostaccurate,butalsothemostcomplexandtime-consuming.tousedifferentsimulationmodes.，会多次使用到模拟器第四章概述仿真软件从高到低有以下几类模拟设计过程中，才能进行

7、真正精确的时序模拟：不要混要以上两种模拟器4.1:ASIC•Behavioralsimulation•Functionalsimulation•Statictiminganalysis•Gate-levelsimulation•Switch-levelsimulation•Transistor-levelorcircuit-levelsimulation*Whileitisjustpossibletoperformabehavioral-completesystem,itisimpossibletoperforma

8、circofmorethanafewhundredtransistors.ASICswitch-levelsimulationtransistor-levelsimulationmixed-modesimulator:mixed-levelsimulators:注意在对逻辑单元的延迟进行模拟实现后2；；；；；；；；；；；；strength和和和强度强度强度强