嵌入式双端口sram中读写干扰问题的-研究

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1、上海交通大学硕士学位论文STYDYONTHEREAD/WRITE-DISTURBISSUEINEMBEDDEDDUAL-PORTSRAMABSTRACTTheembeddedStaticRandomAccessMemory(SRAM)isanimportantpartofmodernSoC;Withtheadvanceofthemanufacturingprocess,thestudyonSRAMneverstops.Dual-PortSRAM(DP-SRAM)canprovidethesystemwithahighercommunicationefficiencyandparal

2、lelcomputingcapability.Withtheenhancementofthesystemthroughput,DP-SRAMbecomesmoreandmorepopular.AimedattheRead/Write-DisturbissueinDP-SRAM,thememorycellandperipheralcircuitsoftheembeddedSRAMarefullystudied.Thecompleteread/writeoperationprocessofSRAMisclearlydescribed.ThemechanismoftheRead/Writ

3、e-Disturbissueisanalyzed,oneinstanceofTSMC28nmDP-SRAM(TSDN28HPM)issimulatedandadeterioratedwrite-disturbissueisfoundat6σvariationoftheprocess.Adetailedanalysisisfurthermade,basedonwhichaproposedword-linepulsecontroltechniquesolvestheproblem.Themainachievementsofthispaperareasbelow:Firstly,thef

4、lexibletrackingcircuitsandthecharacteristicofsenseamplifierin28nmembeddedSRAMaregiven.Secondly,awrite-failcausedbywrite-disturbinTSDN28HPMisobtainedbysimulationandtheclockskewdependencyofthewrite-disturbisalsosimulated.Thirdly,aword-linepulsecontrolstrategyisproposed.Thewrite-failisresolvedbyc

5、ontrollingtheassertiontimeandthewidthoftheword-linepulse.Usingthe28nmHPMprocessofTSMC,thepost-layoutsimulationisperformedacrossallthedesigncorners,whichshowsthemethodisfeasibleandeffective.KEYWORDS:SRAM,Dual-PortSRAM,Read/Write-Disturb,ProcessVariation,Word-LinePulseII万方数据上海交通大学硕士学位论文目录摘要·····

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7、································································-1-1.1研究背景及意义····························································································-1-1.2国内外研究现状······················································