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1、摘要由于条件的限制，本论文对器件的一些结构测试还存在缺陷，主要包括对数字时钟管理器的测试，由于测试平台条件的限制，测试时只能做到功能测试，对于较高的频率测试要求没能达到；还有对本地互联线资源的故障模型还未能找到一种很好的解决方案，用以实现简单有效的测试。这些问题有待今后继续研究。关键词：百万门级FPGA，泰瑞达J750，测试理论，测试方案，ATEII万方数据ABSTRACTABSTRACTFPGA,FieldProgrammableGateArray,itisdeeplylovedbyengineersofres
2、earching,developingandapplyingforitsabundantinteriorresourcesandflexibilityinapplication.Ithasbeenrapidlydevelopedandappliedinvariousfields.MillionGatesFPGAchiphasbeenresearchedandproducedbydomesticChineseengineers.Testtechnologyhasalsowidelybeenpaidattention
3、andresearched.FormanufacturesofFPGAchips,ATE,AutomaticTestEquipment,shouldbeappliedtotestthechipsinlotsize.J750largescaleintegratedcircuittestsystemfromTeradyneisoneofthemostextensivelyappliedtestsystemsdomesticChina.ThusFPGAtestsystemsresearchingbasedonJ750h
4、avegoodtransportabilityandeasytopopularize.Theyhaveacertainhighapplicationvalue.ThispaperappliesJ750fortestdevelopmentplatform,appliesmilliongatelevelFPGAproductedbyChengduSinoMicroelectronicsTech.Co.,Ltdasresearchmodel,researchitstestmethod.Themainworkofthis
5、paperisfollowing:Firstly,westudytheresearchingstatusofFPGAdevicedomesticallyandinternationally.WeanalyzedthefuturedevelopmenttrendofFPGA.Andwepointouttheresearchdirectionanddiscusscontent.Secondly,weparticularlyanalyzetheframeandinteriorconstructofthedevicewe
6、researchedinthepaper,includingConfigurableLogicBlock(CLB),programmableInputOutputBlock(IOB),BlockselectRAM,DigitalClockManager(DCM),multiplyingunit,interiorinterconnectionandtheconfigurationofthedevice.Theresearchingworkinthispartdefinedadirectionforthelaterw
7、orkinthispaper.Thirdly,basedonthedeviceconstructresearching,weanalyzetherelativefaultmodelonebyoneinthispaper.Wediscusssometheoriesmainlyincludingexhaustiontest,pathscanningtestmethod,builtinselftest(BIST),boundaryscantestmethod.Wespecificallydiscussthefaultm
8、odelandtestmethodforinteriorinterconnectionofFPGA.Thesetheoriesgreatlysupporttherestdiscussionofthispaper.Finally,applyingmilliongatelevelFPGAasourtargetchip,wediscusstheIII万方数据ABSTRACTsp
