基于eoc物理层芯片的时钟树综合设计

基于eoc物理层芯片的时钟树综合设计

ID:33011593

大小:2.78 MB

页数:68页

时间:2019-02-19

基于eoc物理层芯片的时钟树综合设计_第1页
基于eoc物理层芯片的时钟树综合设计_第2页
基于eoc物理层芯片的时钟树综合设计_第3页
基于eoc物理层芯片的时钟树综合设计_第4页
基于eoc物理层芯片的时钟树综合设计_第5页
资源描述:

《基于eoc物理层芯片的时钟树综合设计》由会员上传分享,免费在线阅读,更多相关内容在行业资料-天天文库

1、北京.[业大学工学硕士学位论文.Ⅱ.ABSTRACTAbstractThispaperisdiscussinghowtoachieveamoreoptimizedimplementationoftheclocktreesynthesissolutioninthephysicaldesignoftheEOC(EthemetOVerCoax)physicallayerchipBES7000.EOCisatechnologyofethemetdatatransmissionovercoax.Itisusedinthehighpermeabil

2、ityandhighbandwidthaccesstointeractivetelevisionservicesinthefuture.Clocktreesynthesisisaveryimportantstepinthehighperformancechipdesign.Therapiddevelopmentofhigh—speed,lowpowerconsumption,high-performanceofVLSIhasputforwardhigherrequirementsforclocktree.Themainobjective

3、sofclocktreesynthesisistominimizetheclockskewandphasedelaytoprovidemaximumservicesfortimingclosure,meanwhile,tominimizepowerconsumption,noiseandcouplingbetweenconnectionsoftheclocknetwork.Agoodclocktreedesigndirectlyplaysacrucialroleinpower,area,routingcongestionandcross

4、talkoftheentiredesign.Thisthesisdidadeepresearchinareasofthemostcriticalissuesofclocktreesynthesis.Firstofa11.aschipdesignscontinuetoraisethehighestworkingfrequencyandthedesignscalehasbeenincreasedcontinually,accompaniedbycrosstalkcouplingeffectsbetweentheconnectionsunde

5、rdeepsub-micronprocess,therequirementoftimingclosureisincreasinglydifficulttobemet.Andtheclocktreesynthesisisthemostcriticalfactorintimingclosure.Secondly,toconsiderthetestofmassproduction,inadditiontothenormalfunctionmodeotherthantestpatternsisthedesignrequirementaswell

6、,twomodelsneedtomeettimingclosureatthesametime.Italsomakesclocktreesynthesispresentmajorchallenges.Moreover,withaccesstodeeperprocessnodes,thecrosstalkeffectsinclockroutinghaveaseriousimpactontheclocktreeandtimingclosureinchipdesign.ThedesigniscompletedontheEDAplatformof

7、AstrofromSynopsys,basedonBES7000chipclocktreedesign.Firstitanalysesthebasicprinciplesofclocktree,andplansforclocktreesynthesisbasedontheflowofphysicaldesign,setclockportandclocktreesynthesisparametersaccordingly.Thenitimplementsthebasicclocktreesynthesisbasedontheclockst

8、ructure,analysestheresultoftimingclosure,sumsupthespecialproblemsBES7000chips.Andtryavarietyofstrategie

当前文档最多预览五页,下载文档查看全文

此文档下载收益归作者所有

当前文档最多预览五页,下载文档查看全文
温馨提示:
1. 部分包含数学公式或PPT动画的文件,查看预览时可能会显示错乱或异常,文件下载后无此问题,请放心下载。
2. 本文档由用户上传,版权归属用户,天天文库负责整理代发布。如果您对本文档版权有争议请及时联系客服。
3. 下载前请仔细阅读文档内容,确认文档内容符合您的需求后进行下载,若出现内容与标题不符可向本站投诉处理。
4. 下载文档时可能由于网络波动等原因无法下载或下载错误,付费完成后未能成功下载的用户请联系客服处理。