基于vhdl的m序列伪随机信号发生器的设计 毕业设计论文

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1、题目：基于VHDL的m序列发生器的设计摘要：VHDL/CPLD即复杂可编程逻辑器件作为一种大规模集成电路，可根据用户的需要自行构造逻辑功能，可实现较大规模的电路设计，因此被广泛应用于产品的原型设计和产品生产之中。几乎所有应用中小规模通用数字集成电路的场合均可应用CPLD器件。本文介绍了基于CPLD的m序列发生器的设计方法。关键词：CPLD；MAX+PLUSII；伪随机码；ｍ序列发生器42毕业设计(论文)外文摘要Title:M—sequenceGeneratorBasedCPLDAbstract:VHDL/

2、CPLDComplexProgrammableLogicDevicethatis,asalargescaleintegratedcircuitscanbeconstructedaccordingtotheneedsofusersontheirownlogic,enablinglarge-scalecircuitdesign,itiswidelyusedinproductdesignandprototypeproductioninto.Almostallapplicationsofsmallandmediu

3、mgeneral-purposedigitalintegratedcircuitsmaybeappliedCPLDdevicesoccasions.Thisarticledescribesthem-sequencegeneratorbasedonCPLDdesignmethod.Keywords:CPLD；MAX+PLUSII；PseudorandomCode；msequencecodeGenerator42目录前言61课题介绍.......................................

4、..............................................................................71.1为什么研究此课题............................................................................................71.2伪随机序列的应用与意义..........................................................

5、........................................71.3伪随机序列的研究现状......................................................................................................81.4研究内容...........................................................................................

6、...................................82设计中使用芯片及VHDL语言介绍...........................................................................................92.1CPLD芯片介绍...................................................................................................

7、................92.1.1概述.............................................................................................................................92.1.2MAX7000特点...........................................................................................

8、...............92.1.3EPM7128LC84-7......................................................................................................113伪随机序列介绍.....................................................................