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时间:2018-11-04
《基于ise的数字秒表的设计与仿真》由会员上传分享,免费在线阅读,更多相关内容在工程资料-天天文库。
1、:字秒表设计实验报告学院(系):专业:学号:学生姓名:指导教师:目录未找到目录项。摘要木次实验设计使用的软件TSE主要功能包括设计输入、综合、仿真、实现和下载,涵盖了nJ编程逻辑器件开发的全过程,从功能上讲,完成CPLD/FPGA的没计流程无需借助任何笫三方EDA软件。而本次设计目的在于设计一个可以自动计数、清零、锁存、暂停的、显示范围为59分59秒,精确度为百分之一秒的数字秒表并熟练利Wmodelsim仿真软件进行仿真外从屮不断检验错误,修改程序达到学习提高的效果。为达到实验目的,木设计分为:分频器,锁存器,计数器,
2、控制器及消抖电路。关键词:TSE;modelsim仿真;数字秒表设计;FPGA可编程逻辑器件;检验;学习AbstractTheISEsoftwareusedinexperimentaldesignthemainfunctionincludingdesign,implementation,integration,simulationanddownload,coversthewholeprocessofthedevelopmentofprogrammablelogicdevices,tellfromthefunction,
3、completedthedesignofCPLD/FPGAwithoutusinganythird-partyEDAsoftware.Andthepurposeofthedesignistodesignanautomaticcounting,reset,latches,suspended,displayareafor59minutesand59seconds,accuracyofonepercentseconddigitalstopwatchandskilleduseofthemodelsinisimulationso
4、ftwaresimulationandcontinuousinspectionerror,modifytheprogramtoimprovelearningeffect.Forthepurposeoftheexperiment,thedesignisdividedinto:frequencydivider,latch,counter,controllerandshakecircuit.Key凌阳,拇指凌PIIWOrdS:TSE;modelsim;digitalstopwatch;TheFPGAprogrammablel
5、ogicdevices;check;learn1引言在传统的硬件电路设计中,主要的设计文件是电路原理图,而采用硬件描述语言(VHDL)设计系统硬件电路吋主要使用VHDL编写源程序。所谓硬件描述语言,就是该语言可以描述硬件电路的功能、信号连接关系及定时关系。EDA代表了当今电子设计技术发展的方向,它的基木特征是:设计人员按照“0顶向下”的设计方法,对整个系统进行方案设计和功能划分系统的关键电路,用一片或几片专用集成AST实现,然后采用硬件描述语AbstractTheISEsoftwareusedinexperimenta
6、ldesignthemainfunctionincludingdesign,implementation,integration,simulationanddownload,coversthewholeprocessofthedevelopmentofprogrammablelogicdevices,tellfromthefunction,completedthedesignofCPLD/FPGAwithoutusinganythird-partyEDAsoftware.Andthepurposeofthedesign
7、istodesignanautomaticcounting,reset,latches,suspended,displayareafor59minutesand59seconds,accuracyofonepercentseconddigitalstopwatchandskilleduseofthemodelsinisimulationsoftwaresimulationandcontinuousinspectionerror,modifytheprogramtoimprovelearningeffect.Forthe
8、purposeoftheexperiment,thedesignisdividedinto:frequencydivider,latch,counter,controllerandshakecircuit.Key凌阳,拇指凌PIIWOrdS:TSE;modelsim;digitalstopwatch;TheFPGAprogramm
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