...第2章_硬件结构 双语教学《单片机原理及应用》讲义

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1、Chapter2:HardwarestructureofmicrocontrollerMicrocontrollerPrincipleandApplication主讲教师：黄英1Chapter2Hardwarestructureofmicrocontroller2.1Logicstructureandsignalpins2.2Internalmemory2.3ParallelInput/outputports2.4Clockcircuitandtiming2.5WorkingModes22.1.1Thefeatur

2、esof8051core2.1Logicstructureandsignalpins8051:ThecoreofMCS-51devicesTheoriginalmemberoftheMCS-51familiy8-bitCPUoptimizedforcontrolapplicationsExtensiveBooleanprocessing（single-bitlogic）capabilities64KProgramMemoryaddressspace64KDataMemoryaddressspace4KByteso

3、fon-chipProgramMemory128Bytesofon-chipDataRAM32bidirectionalandindividuallyaddressableI/OlinesTwo16-bittimer/countersFullduplexUART5-sourceinterruptstructurewithtwoprioritylevelsOn-chipclockoscillator32.1LogicstructureandsignalpinsBlockDiagramof8051coreCPU4×8-

4、bitI/OPortsTimer0SerialPortOSCInterruptControlExternalinterruptsTimer12×16-bitTimer/Counter64KBBusExtendControlTxDRxDP0P1P2P3CounterInputs4K×8-bitROM128×8-bitRAM4TheInternalLogicStructureofAT89C5152.1.2SignalPinsofAT89S512.1Logicstructureandsignalpins62.1Logi

5、cstructureandsignalpinsVCCGNDPort0Port1Port2Port3RSTALE/PROGPSENEA/VPPXTAL1XTAL22.1.2SignalPinsofAT89S5172.1Logicstructureandsignalpins82.2.1InternalDataMemory2.2InternalmemoryTheAT89C51has128bytesofon-chipRAMplusanumberofSFRs.SFR:SpecialFunctionReg

6、isters92.2.1InternalDataMemoryFigure:Lower128bytesUpper128bytes102.2.1InternalDataMemoryRegisterArea:RegisterBanks（0、1、2、3）（32Bytes）BitAddressableArea（16Bytes）UserRAMArea（80Bytes）Thisareacanbedividedinto3parts（1）Lower128bytesofInternalRAM112.2.1InternalData

7、MemoryFigurescratchpadregister便笺式寄存器,暂时寄存器UserRAMarea:122.2.1InternalDataMemory（1）Lower128bytesofInternalRAMThisareaisgroupedinto4banksof8registers（R0～R7）Twobits,RS1andRS0,inProgramStatusWord（PSW）areforselectingwhichregisterbankisinuse.（00、01、10、11）Thisallo

8、wsmoreefficacioususeofcodespace,sinceregisterinstructionsareshorterthaninstructionsthatusedirectaddressing.Theaddressesinthisareaare00Hthrough1FH.①RegistersArea:R