外文翻译---语言概观

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1、附录4英文资料及译文1英文资料(FromDIGITALDESIGNprinciples&practices,JohnF.Wakerly)LanguageOverviewWhatisVHDL?VHDLisaprogramminglanguagethathasbeendesignedandoptimizedfordescribingthebehaviorofdigitalsystems.VHDLhasmanyfeaturesappropriatefordescribingthebehaviorofelectroni

2、ccomponentsrangingfromsimplelogicgatestocompletemicroprocessorsandcustomchips.FeaturesofVHDLallowelectricalaspectsofcircuitbehavior(suchasriseandfalltimesofsignals,delaysthroughgates,andfunctionaloperation)tobepreciselydescribed.TheresultingVHDLsimulationmod

3、elscanthenbeusedasbuildingblocksinlargercircuits(usingschematics,blockdiagramsorsystem-levelVHDLdescriptions)forthepurposeofsimulation. VHDLisalsoageneral-purposeprogramminglanguage:justashigh-levelprogramminglanguagesallowcomplexdesignconceptstobeexpresseda

4、scomputerprograms,VHDLallowsthebehaviorofcomplexelectroniccircuitstobecapturedintoadesignsystemforautomaticcircuitsynthesisorforsystemsimulation.LikePascal,CandC++,VHDLincludesfeaturesusefulforstructureddesigntechniques,andoffersarichsetofcontrolanddatarepre

5、sentationfeatures.Unliketheseotherprogramminglanguages,VHDLprovidesfeaturesallowingconcurrenteventstobedescribed.ThisisimportantbecausethehardwaredescribedusingVHDLisinherentlyconcurrentinitsoperation.OneofthemostimportantapplicationsofVHDListocapturetheperf

6、ormancespecificationforacircuit,intheformofwhatiscommonlyreferredtoasatestbench.TestbenchesareVHDLdescriptionsofcircuitstimuliandcorrespondingexpectedoutputsthatverifythebehaviorofacircuitovertime.TestbenchesshouldbeanintegralpartofanyVHDLprojectandshouldbec

7、reatedintandemwithotherdescriptionsofthecircuit. AstandardlanguageOneofthemostcompellingreasonsforyoutobecomeexperiencedwithandknowledgeableinVHDLisitsadoptionasastandardintheelectronicdesigncommunity.UsingastandardlanguagesuchasVHDLvirtuallyguaranteesthatyo

8、uwillnothavetothrowawayandrecapturedesignconceptssimplybecausethedesignentrymethodyouhavechosenisnotsupportedinanewergenerationofdesigntools.Usingastandardlanguagealsomeansthatyouaremorelikelyto