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1、上海交通大学硕士学位论文深亚微米集成电路时钟线网的设计布线和优化算法研究姓名：刘锋申请学位级别：硕士专业：电磁场与微波技术指导教师：毛军发20060101上海交通大学硕士学位论文ABSTRACTDESIGN,ROUTINGANDOPTIMIZATIONOFCLOCKDISTRIBUTIONNETWORKSFORDEEPSUBMICRONINTEGRATEDCIRCUITABSTRACTDuetotheVLSItechnologyrapidprogressingandthefeaturesizecontinuedshrinking,thedensityandoper
2、ationfrequencyofIChavebeenincreasedgreatly.Inthestageofverydeepsubmicrontechnology,thedelaycausedbyinterconnectinphysicaldesignhasexceededthegatedelay,interconnectnetworkshasbecomethedominantfactorindeterminingcircuitperformanceandreliability.Thedistributionofclocksignalsiscriticaltob
3、oththeoperationandperformanceofsynchronousdigitalsystems,therefore,theresearchonthedesign,routingandoptimizationalgorithmforclockdistributionnetworkismoreandmoreimportant.Afterreviewingtheachievementofinterconnectnetworkmodeling,clockdistributionnetworkdesign,routingandoptimization,an
4、ovelstabledelaycalculationmodelforinterconnecttreeandanovelalgorithmforconstructingclockdistributionnetworkbysimultaneouslyroutingandwire-sizingareproposed.ThenewinterconnectdelaymodelisbasedonthedistributedRLCparametermodel.Thenewmodelcalculatesthe“equivalentABCDmatrix”oftheinterconn
5、ecttreeforapproximationsoftransferfunctionsoftheinterconnecttree,andthenderivestheclosed-formsolutionforthe50%delaybymeansofsecond-ordermomentmatchingandcurvefitting.Simulationresultsshowthatthenewmodelismuchfasterthanthetraditionalmethodsandhasanerrorofwithin15%comparedtoHSPICE,atthe
6、sametimeitisstable.Basedonthenewinterconnectdelayestimationmodels,elementaryresearchisperformedonhowtoembeddingthenewmodelintothenonlinearprogrammingbasedwiresizingmethod.Intheend,accordingtheachievedclockroutingalgorithmsandwiresizingii上海交通大学硕士学位论文ABSTRACTalgorithms,aalgorithmforcloc
7、kdistributionnetworkconstructionbysimultaneouslyroutingandwire-sizingisproposed.Thenewalgorithmcanreducethepathdelaybyabout50%comparedtotheresultwhichperformtheGreedy-DMEclockroutingalgorithm.KEYWORDS:verydeepsubmicron,zeroskew,clockrouting,wiresizingiii上海交通大学学位论文原创性声明本人郑重声明：所呈交的学位论文，
8、是本人在导
