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1、PulseswallowfrequencydividerwithidleCKDFFsautomaticallypoweredoffS2QBCKCKQDS1HaijunGao,LinglingSunandJunLiuS3CKApulseswallowfrequencydividerwithultra-lowpowerconsumptionispresented.TheDflip-flops(DFFs)intheprescalerandtheswallowcounterarecontrolledbythemodulusc
2、ontrolsignalandareautomat-DQBicallypoweredoffwhentheyhavenocontributiontotheoperationofDQBlatch1thedivider.ImplementedinSMIC65nmCMOSprocess,theproposedlatch2dividercanoperatefrom0.6to4.2GHz,andthepowerconsumptionisCK1.35mWwhenoperatingat2.4GHz.FoutMCaIntroduc
3、tion:ThepowerconsumptionofRFbuildingblocksisabottle-CKneckforlongbatterylifetime.Thefrequencydivider,workingattheDhighestfrequency,isacriticalcomponentforlowpowerdesign.PreviousresearcheshavefocusedontheimplementationsoflowS1powerDflip-flops(DFFs).In[1],acurren
4、tmodelogic(CML)D-latchthatintegratesthedynamicconfigurationisproposed;itopti-S2misestheperformanceinpowerconsumption,outputvoltageswingandoperatingfrequency.In[2],amono-stablecircuitisinsertedQBbetweentheinputsignalandtheD-latch.Theproposedmono-stablefre-S3que
5、ncydividersignificantlyminimisesthenumberofswitchingtransis-torsandthusreducesthedynamicpowerdissipation.In[3],areloadablebflip-flopisproposedtoreducethepowerconsumptionofthedivider.InthisLetter,theworkingstateoftheconventionalpulseswallowfre-Fig.2Conventionalpr
6、escalerstructure,andtimediagramofinternalnodesquencydividerisanalysed.Anewarchitecture,withDFFsinthepresca-aConventionalprescalerstructurelerandtheswallowcountercontrolledbythemoduluscontrolsignalandbTimediagramofinternalnodesautomaticallypoweredoffwhentheyha
7、venocontributiontotheoper-ationofthedivider,isproposedtoachievelowpowerconsumption.MP1CKMCCKCKCKQBQCircuitdesign:Fig.1showstheblockdiagramoftheconventionalDQBCKCKQCKpulseswallowfrequencydivider.WhenthecircuitbeginsfromtheDresetstate,theprescalerdividesFinby(N
8、+1).Theoutputofthepre-CKMCscalerisdividedbyboththeprogramcounterandtheswallowcounterMN1untilthelatteris‘full’.Atthispoint,theswallowcounterchangesthestateofthemoduluscontrol(MC)line,makin