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1、moduleJKchufa(set,clr,clk,j,k,q3,q3_);inputset,clr,clk,j,k;outputq3,q3_;regq3,q3_;always@(setorclr)beginif(set==1)beginq3<=1;q3_<=0;endelseif(set==0&clr==1)beginq3<=0;q3_<=1;endendalways@(negedgeclk)beginif(j==1&k==0&set==0&clr==0)beginq3<=1;q3_<=0;endelseif(j==0&k==1&set==0
2、&clr==0)beginq3<=0;q3_<=1;endelseif(j==1&k==1&set==0&clr==0)beginq3<=!q3;q3_<=!q3_;endendendmodulemoduleDchufa(set,clr,clk,d,q2,q2_);inputset,clr,clk,d;outputq2,q2_;regq2,q2_;always@(setorclr)beginif(set==1)beginq2<=1;q2_<=0;endelseif(set==0&clr==1)beginq2<=0;q2_<=1;endendal
3、ways@(posedgeclk)beginif(d==0&set==0&clr==0)beginq2<=0;q2_<=1;endelseif(d==1&set==0&clr==0)beginq2<=1;q2_<=0;endendendmodule测试程序`timescale1ns/100ps`include"SRchufa.v"`include"JKchufa.v"`include"Dchufa.v"moduletb_chufa;regs,r,d,j,k,set,clr,clk;wireq1,q1_,q2,q2_,q3,q3_;always#
4、50clk=~clk;initialbeginclk<=0;s<=0;r<=0;d<=0;j<=0;k<=0;set<=0;clr<=0;#50s<=1;r<=0;d<=1;j<=1;k<=0;set<=1;clr<=0;#50s<=1;r<=0;d<=1;j<=1;k<=0;set<=0;clr<=1;#50s<=1;r<=0;d<=1;j<=1;k<=0;set<=0;clr<=0;#50s<=0;r<=1;d<=0;j<=0;k<=1;set<=0;clr<=0;#50s<=1;r<=1;d<=0;j<=1;k<=1;set<=0;clr
5、<=0;#400$stop;endSRchufaoo(set,clr,clk,r,s,q1,q1_);Dchufaox(set,clr,clk,d,q2,q2_);JKchufaoy(set,clr,clk,j,k,q3,q3_);endmodule
