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1、ALatticeSemiconductorWhitePaperOctober2014LatticeSemiconductor5555NortheastMooreCt.Hillsboro,Oregon97124USATelephone:(503)268-8000www.latticesemi.comWP001IntroductionAnewgenerationofcompact,lowpowerandlowcostSERializer/DESerializer(SERDES)enhancedfieldprogrammablegatearrays(FPGAs)are
2、increasinglybeingusedwithapplicationspecificintegratedcircuits(ASICs)andapplicationspecificstandardproducts(ASSPs)byequipmentdesignerstorapidlybuildflexiblesystemsthatmeettightcost,powerandformfactorconstraintsofmanyemerginghighvolumeapplications.TheseSERDES-enhancedFPGAsbreaktherule
3、thatFPGAsmustbehighdensity,powerhungryandexpensivehavingbeenoptimizedforlowcost,smallformfactorandlowpowerconsumption,makingthemidealfordeliveringprogrammableconnectivitysolutionstocomplementASICsandASSPs.TotakeadvantageofSERDES-enhancedFPGAs’uniquecapabilities,designersmustunderstan
4、dabitabouthowtheywork,aswellassomeoftheirthermal,electricalandsignalintegrityrequirements.Thematerialpresentedhereisintendedtofamiliarizeyouwiththisnewbreedofdevices,thebenefitstheyofferandintroducethedesignpracticesneededtosuccessfullyusethem.UsingFPGAfamilywithembeddedSERDES,itcani
5、ntroduceseveralimportantissueswhichcanaffecttheperformanceoftheSERDES-baseddevice,andpracticalsolutionswhichyoucanapplytoyourdesign.Mostoftheissuescoveredherewillapplytothe3.25GbpsSERDEStransceivercoresfoundinmanySERDES-enhancedFPGAscurrentlyonthemarket,butitwillalsodiscusssomeTMofth
6、euniquefeaturesLatticehasaddedtotheECP5platformtoitsimproveperformanceanddesignflexibility.TheFPGA+SERDESAdvantageOriginallydevelopedforhigh-performancepacketprocessingandroutingelementsincarrier-classnetworkingequipment,FPGAsequippedwithembeddedSERDEStransceivershavebeenavailablefor
7、overadecade.Theselarge,powerfuldeviceswerefabricatedusingthearchitecturesandprocessesdesignatedforthemanufacturers’“flagship”productlines,andcosthundreds,oreventhousandsofdollarseach.Since2EnablingProgrammableConnectivitySolutionsforCompact,HighVolumeApplicationsALatticeSemiconductor
8、WhitePaperth