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1、ALatticeSemiconductorWhitePaperOctober2014LatticeSemiconductor5555NortheastMooreCt.Hillsboro,Oregon97124USATelephone:(503)268-8000www.latticesemi.comWP001IntroductionAnewgenerationofcompact,lowpowerandlowcostSERializer/DESerializer(SERDES)enhancedfieldpr
2、ogrammablegatearrays(FPGAs)areincreasinglybeingusedwithapplicationspecificintegratedcircuits(ASICs)andapplicationspecificstandardproducts(ASSPs)byequipmentdesignerstorapidlybuildflexiblesystemsthatmeettightcost,powerandformfactorconstraintsofmanyemerging
3、highvolumeapplications.TheseSERDES-enhancedFPGAsbreaktherulethatFPGAsmustbehighdensity,powerhungryandexpensivehavingbeenoptimizedforlowcost,smallformfactorandlowpowerconsumption,makingthemidealfordeliveringprogrammableconnectivitysolutionstocomplementASI
4、CsandASSPs.TotakeadvantageofSERDES-enhancedFPGAs’uniquecapabilities,designersmustunderstandabitabouthowtheywork,aswellassomeoftheirthermal,electricalandsignalintegrityrequirements.Thematerialpresentedhereisintendedtofamiliarizeyouwiththisnewbreedofdevice
5、s,thebenefitstheyofferandintroducethedesignpracticesneededtosuccessfullyusethem.UsingFPGAfamilywithembeddedSERDES,itcanintroduceseveralimportantissueswhichcanaffecttheperformanceoftheSERDES-baseddevice,andpracticalsolutionswhichyoucanapplytoyourdesign.Mo
6、stoftheissuescoveredherewillapplytothe3.25GbpsSERDEStransceivercoresfoundinmanySERDES-enhancedFPGAscurrentlyonthemarket,butitwillalsodiscusssomeTMoftheuniquefeaturesLatticehasaddedtotheECP5platformtoitsimproveperformanceanddesignflexibility.TheFPGA+SERDE
7、SAdvantageOriginallydevelopedforhigh-performancepacketprocessingandroutingelementsincarrier-classnetworkingequipment,FPGAsequippedwithembeddedSERDEStransceivershavebeenavailableforoveradecade.Theselarge,powerfuldeviceswerefabricatedusingthearchitecturesa
8、ndprocessesdesignatedforthemanufacturers’“flagship”productlines,andcosthundreds,oreventhousandsofdollarseach.Since2EnablingProgrammableConnectivitySolutionsforCompact,HighVolumeApplicationsALatticeSemiconductorWhitePaperth
