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1、DigitalIntegratedCircuitsADesignPerspectiveArithmeticCircuitsJanM.RabaeyAnanthaChandrakasanBorivojeNikolicJanuary,20031AGenericDigitalProcessor2BuildingBlocksforDigitalArchitecturesArithmeticunit-Bit-sliceddatapath(adder,multiplier,shifter,comparator,etc.)Memory-RAM,ROM,
2、Buffers,ShiftregistersControl-Finitestatemachine(PLA,randomlogic.)-CountersInterconnect-Switches-Arbiters-Bus3AnIntelMicroprocessorItaniumhas6integerexecutionunitslikethis4Bit-SlicedDesign5Bit-SlicedDatapath6ItaniumIntegerDatapathFetzer,Orton,ISSCC’027Adders8Full-Adder9T
3、heBinaryAdder10ExpressSumandCarryasafunctionofP,G,DDefine3newvariablewhichONLYdependonA,BGenerate(G)=ABPropagate(P)=AÅBDelete=ABCanalsoderiveexpressionsforSandCobasedonDandPPropagate(P)=A+BNotethatwewillbesometimesusinganalternatedefinitionfor11TheRipple-CarryAdderWorstc
4、asedelaylinearwiththenumberofbitsGoal:Makethefastestpossiblecarrypathcircuittd=O(N)tadder=(N-1)tcarry+tsum12ComplimentaryStaticCMOSFullAdder28Transistors13InversionProperty14MinimizeCriticalPathbyReducingInvertingStagesExploitInversionProperty15ABetterStructure:TheMirror
5、Adder16MirrorAdderStickDiagram17TheMirrorAdderTheNMOSandPMOSchainsarecompletelysymmetrical.Amaximumoftwoseriestransistorscanbeobservedinthecarry-generationcircuitry.Whenlayingoutthecell,themostcriticalissueistheminimizationofthecapacitanceatnodeCo.Thereductionofthediffus
6、ioncapacitancesisparticularlyimportant.ThecapacitanceatnodeCoiscomposedoffourdiffusioncapacitances,twointernalgatecapacitances,andsixgatecapacitancesintheconnectingaddercell.ThetransistorsconnectedtoCiareplacedclosesttotheoutput.Onlythetransistorsinthecarrystagehavetobeo
7、ptimizedforoptimalspeed.Alltransistorsinthesumstagecanbeminimalsize.18TransmissionGateFullAdder19ManchesterCarryChain20ManchesterCarryChain21ManchesterCarryChainStickDiagram22Carry-BypassAdderAlsocalled Carry-Skip23Carry-BypassAdder(cont.)tadder=tsetup+Mtcarry+(N/M-1)tby
8、pass+(M-1)tcarry+tsum24CarryRippleversusCarryBypass25Carry-SelectAdder26CarrySelectAdder:CriticalPath27
