第四章：静态功耗优化技术.ppt

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1、前次课回顾ClockGatingOperandIsolation逻辑级功耗优化工艺映射，LogicRestructuring电路级功耗优化第四章多电压域设计技术（Multi-VoltageDomain）4.1多电压域设计VLSI发展的一个重要趋势是SOC工艺的进步使SOC成为可能；设计复杂度的提高需要新的设计方法SOC中各部分性能要求不尽相同，可工作在不同电压下，性能要求高的工作的高电压域，反之。。。同一部分根据其工作负荷也可工作在不同电压工作电压可以有不同变化方式•StaticVoltageScaling(SVS)

2、:differentblocksorsubsystemsaregivendifferent,fixedsupplyvoltages.（最简单的多电压域设计）•Multi-levelVoltageScaling(MVS):anextensionofthestaticvoltagescalingcasewhereablockorsubsystemisswitchedbetweentwoormorevoltagelevels.Onlyafew,fixed,discretelevelsaresupportedfordiffe

3、rentoperatingmodes.•DynamicVoltageandFrequencyScaling(DVFS):anextensionofMVSwherealargernumberofvoltagelevelsaredynamicallyswitchedtofollowchangingworkloads.•AdaptiveVoltageScaling(AVS):anextensionofDVFSwhereacontrolloopisusedtoadjustthevoltage.就是最简单的multi-volt

4、age设计（SVS）也给设计增加了难度•Levelshifters.Signalsthatgobetweenblocksthatusedifferentpowerrailsoftenrequirelevelshifters•CharacterizationandSTA.Withasinglesupplyfortheentirechip,timinganalysiscanbedoneatasingleperformancepoint.Thelibrariesarecharacterizedforthispoint,an

5、dthetoolsperformtheanalysisinastraight-forwardmanner.Withmultipleblocksrunningatdifferentvoltages,andwithlibrariesthatmaynotbecharacterizedattheexactvoltageweareusing,timinganalysisbecomesmuchmorecomplex•Floorplanning,powerplanning,grids.Multiplepowerdomainsreq

6、uiremorecarefulanddetailedfloorplanning.Thepowergridsbecomemorecomplex.•Boardlevelissues.Multi-voltagedesignsrequireadditionalresourcesontheboard–additionalregulatorstoprovidetheadditionalsupplies.•Powerupandpowerdownsequencing.Theremaybearequiredsequenceforpow

7、eringupthedesigninordertoavoiddeadlock.•高电压电源推低电压单元一般不会有问题但时序参数不准，因库单元的时序参数是针对同电位的驱动和接收电路的，驱动端过驱动的时序最好专门单元4.2LevelShifter•低推高时会出现P、N管同时导通，必须用LevelShifterSuch“up-shifting”levelconvertersrequiretwosupplyrails–andtypicallyshareacommonground.Thewellstructurescannot

8、bejoinedtogetherbutmustbeassociatedwiththesuppliesindependently.•高推低时，LevelShifter使用低电压，故一般放在低电压域，因其使用低电压4.3LevelShifterPlacement•两电压域的模块距离较远时，可插入Buffer，BUFFER使用高电压•低推高时，Lev