东南大学信息学院 poc实验报告

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1、ComputerOrganizationandArchitectureCOURSEDESIGNAParallelOutputController------(POC)SoutheastuniversitySchoolofInformationScienceandEngineering1.Designpurposea.Thepurposeofthisprojectistodesignandsimulateaparalleloutputcontroller(POC)whichactsaninterfacebetweensystembusandprinter.

2、TheISE14.7EDAtoolisrecommendedandprovidedforsimulation.b.LearnabouttheusingofBi-directionalDataBus(BDB),anduseaparallelBi-directionalDataBustofinishthedatatransmissionbetweenCPUandPOC.2.IntroductionandTasksPOCisoneofthemostcommonI/Omodules,namelytheparalleloutputcontroller.Itplay

3、stheroleofaninterfacebetweenthecomputersystembusandtheperipheralFigure1.SystemstructurediagramAsFig.1showstheinnerconnectingofaprintertothesystembusthroughthePOC.Thecom-municationbetweenPOCandtheprinteriscontrolledbya“handshake”protocolgiveninFig.2.Figure2.Thehandshake-timingdiag

4、rambetweenPOCandtheprinterThehandshakingprocessisdescribedasfollows:Whentheprinterisreadytoreceiveachar-acter,itholdsRDY=1.ThePOCmustthenholdacharacteratPD(paralleldata)portandproduceapulseattheterminalTR(transferrequest).TheprinterwillchangeRDYto0,takethecharacteratPDandholdRDYa

5、t0untilthecharacterhasbeenprinted(e.g.delay5or10ms),thensetRDYto1againwhenitisreadytoreceivethenextcharacter.ThebufferregisterBRisusedtotemporarilyholdacharactersentfromtheprocessor,whichchar-acterwillbetransferredtotheprinterlater.ThestatusregisterSRisusedfortwocontrolfunctions:

6、①SR7servesasareadyflagtoindicatePOCisreadyornottoreceiveanewcharacterfromtheprocessor.②SR0isusedtoenabletheinterruptrequestssentbyPOC.Ininterruptmode,IfSR0=1,thenPOCwillsendaninterruptrequestsignaltoprocessorwhenitisreadytoreceiveacharacter(i.e.,whenSR7=1).IfSR0=0,thenPOCwillnoti

7、nterrupt.ThetransferofacharactertoPOCviathesystembusproceedsasfollows:Ininterruptmode,SR0isalways1.Aftersendingcharactertoprinter,POCsetstheSR7to1,sinceSR0=1,theinterruptrequestsignal(IRQ)issetto0,whichindicateaneffectiveinterruptsignaltotheprocessor.1、processorsetsthevalueofSR7&

8、setsthevalueofBR①Whentheprocessordetects