宽带捷变频频率合成器的研究与设计

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1、摘要攘要频率合成器是穗子系统的核心部件。随饕现代遴信、雷达、逛子侦察和对抗技术的飞速发餍，系统对其性能指标也提出了愈来愈高的幕求，并且依据应用系统豹不两，对备顼指标要求静循重点瞧有掰不同。萁中，淹变时闯这～指标，由于鬣按影响蓟黟i频干扰和抗干扰系统的耐b速，以赦雷达频率捷变特性，越来越受至1人髓豹关注。本文童要辩捷交频频率合袋技术避行分耩翻研究。本文首先辩频率合成投术躺发浸避行了褫述，而精对包括模拟直接频率合成、数字誊犊频率合成茅鼙镂相臻凝率合戏在蠹的备释频率合成技术的蒸本工于譬原理进行了分析，在j鼙：蓦稻上，赘整对如何实现捷交颓迸行了详缅酌诧较和研究，并讨

2、论7备塞静优缺点及庭罴藏囝，凰蹲辩捷交辩闯静测疑技沭撬进行了探讨。在考瘩了实税静复杂疫藕寝瘸豹遁爝萑瑟满往等戳索之秸，主簧对锁裙环的捕获时间、辘助撼羧接藤楚其楚VCO电攫颈赘滋行了较深入熬分撰，并放输蹬频率繁宽、步进、捷变惑阁秘杂教}攀露l等方嚣裁蒺予镀穰环盼藏交羧方案避彳亍了缁致鹩错究。溪厦，在趟各秽捷变频技零综会分板敷磺究黪罄戳上，经过发簸蛉方案跪较论{委，设计了一个乙波段256糕Hz磐宽，步遴梵1MHz熬捷变频颇攀含成嚣，捷交时间在4艘以内，不过杂散指榕还蠢特进一步改进。关键谲颠率合成捷嶷频捷交时澜锁穗环ABSTRACTFrequencysynthes

3、izeristhekeycomponentinelectronicsystems。Bythegreatdevelopmentofmodernelectroniccommunication，Radar，electronicdetectorandelectroniccountermeasurestechnology，higherrequirementisneededbythesystem．Accordingtodifferentapplicationfields，thepointsystememphasizesisalsodifferent．Frequency’

4、sswitchingtime．whichdirectlyaffectsthehoppingspeedofinterferentialsystemaswellasRadar’sfrequencyagility，isbeingpaidmoreandmoreattention．Thispapermainlyanalyzedthefrequencysynthesizer’sagilecharacter。Thispaperfirstlysummarizedthedevelopmentoffrequencysynthesistechnology，thenanalyzed

5、thebasicworkingprincipleofvariOUSfrequencysynthesistheories，includinganalogdirectfrequencysynthesis，digitaldirectfrequencysynthesisandPLLsynthesis，especiallydescribedhowtoachievefast—switchingbythesefrequencysynthesis，anddiscussedtheiradvantage，disadvantageandtheapplicatienrangesep

6、arately．Whatismore，themethodstomeasuretheswitchingtimewerealsodiscussed。Afterconsideringthedifficultyandtheuniversalityforapplication，papermadedeepresearchonPLL’scapturetimeandsupplementarypull—inmethod，especiallyVCOpre—tuningmethod．Then，detaildiscussesweregivenon．Finally，onthebasi

7、sofaboveanalysisandresearch，bycomparingvariOUSdesignmethods，aLbandagilefrequencysynthesizerwith256MHzbandwidthandIMHzresolutionwasdesigned，whoseswitchingtimewaswithin4us．However，thespurperformanceistobeimproved．KeyWords：FrequencysynthesisFrequencyAgilitySwitchingtimePLLII独创性声明本人声明所

8、呈交麴学位论文怒本人在导师指导下遴行的磷究工作及墩得