现代计算机组成原理——除法器设计

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1、数字系统组成原理和设计技术实验：除法器学号"15108052姓名詹炳鑫班级电子2班华侨衣曇电&工程系・程序LIBRARYIEEE;USEIEEE.std_logic_1164.ALL;USEIEEE.std_logic_unsigned.ALL;ENTITYdevideISPORT(reset,clock,start:INSTD_LOGIC;x:INSTD_LOGIC_VECTOR(4DOWNTO0);y:INSTD_LOGIC_VECTOR(8DOWNTO0);done,overflow:OUTSTD_LOGIC;q,r:OUTSTD_LOGIC_VECTOR(4DOWNTO0))；ENDd

2、evide;ARCHITECTUREbehavOFdevideISSIGNALrx:STD_LOGIC_VECTOR(5DOWNTO0);SIGNALry:STD_LOGIC_VECTOR(5DOWNTO0);SIGNALrq:STD_LOG1C_VECTOR(4DOWNTO0);SIGNALrmd:STD_LOGIC_VECTOR(5DOWNTO0);SIGNALflag_subadd:bit;SIGNALstate:integerRANGE0TO6;BEGINPROCESS(reset,clock)VARIABLEsq:STD_LOGIC;BEGINIFreset=*0*THENrx<=(

3、OTHERS二>'O');ry<=(OTHERS二>O);rq<=(OTHERS=>*0*);state<=0;ELSIFclock'eventANDclock二TTHENCASESTATEISWHEN0=>rx(5DOWNTO0)<=x(4)&x(4DOWNTO0);ry(5DOWNTO0)<=y(8)&y(8DOWNTO4);rq(4DOWNTO0)<=y(3DOWNTO0)&'O';flag_subadd<=*!';donev二'O';overflow<='O';IFstart=,1,THENstate<=1;ENDIF;WHEN1=>IFrmd(5)二OTHENoverflowv二T;

4、state<=0;done<=rT;ELSEstate<=state+1;sq:='O';ry(5DOWNTO0)<=nnd(4DOWNTO0)&rq(4);rq(4DOWNTO0)<=rq(3DOWNTO0)&sq;flag_subadd<='O';ENDIF;WHEN5=>IFrmd(5)二'O'THENsq：=T；flag_subadd<=ELSEsq:=*0';flag_subadd<='O';ENDIF;ry(5DOWNTO0)<=rmd(4DOWNTO0)&rq(4);ry(5DOWNTO0)<=rmd(5DOWNTO0);rq(4DOWNTO0)<=rq(3DOWNTO0)&sq

5、;state<=state+1;WHEN6=>IFrq(O)=,0,THENry<=rmd(5DOWNTO0);r<=rmd(4DOWNTO0);ELSEr<=ry(4DOWNTO0);ENDIF;state<=0;q<=rq；done<=rr;WHENOTHERS=>IFrmd(5)二OTHENsq:=flag_subadd<=*!';ELSEsq:='O';flag_subadd<='O';ENDIF;ry(5DOWNTO0)<=rmd(4DOWNTO0)&rq(4);rq(4DOWNTO0)<=rq(3DOWNTO0)&sq;state<=state+1;ENDCASE;ENDIF;EN

6、DPROCESS;rmd<=ry+rxWHENflag_subadd='O'ELSEry+NOTrx+1;ENDbehav;-Copyright(C)1991-2011AlteraCorporation—YouruseofAlteraCorporation^designtools,logicfunctions—andothersoftwareandtools,anditsAMPPpartnerlogic-functions,andanyoutputfilesfromanyoftheforegoing—(includingdeviceprogrammingorsimulationfiles),a

7、ndany一associateddocumentationorinformationareexpresslysubject一tothetermsandconditionsoftheAlteraProgramLicense—SubscriptionAgreement,AlteraMegaCoreFunctionLicense-Agreement,orotherapplicablelicenseagr