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1、IEEEJOURNALOFSOLID-STATECIRCUITS,VOL.44,NO.3,MARCH2009751ANewTransceiverArchitectureforthe60-GHzBandAliParsa,Member,IEEE,andBehzadRazavi,Fellow,IEEEAbstract—Anewhalf-RFarchitectureincorporatesatransmit(TX)topologiesbecomescloselyintertwinedwiththepolyphasefilterinthesignalpathtoallowthe
2、useofalocalos-synthesizerdesign.Forexample,thedirect-conversionreceivercillatorfrequencyequaltohalftheinputfrequency.ThereceivershowninFig.1(a)requiresgenerationofquadratureLOphasesperforms90phaseshiftandtwodownconversionstepstopro-ducequadraturebasebandoutputs.Thetransmitterupconverts
3、at60GHz,adifficulttaskbecauseinductorQsbegintosat-thequadraturebasebandsignalsintwosteps,appliestheresultsurateandvaractorQsarelikelytofalltolowlevelsatthesetoapolyphasefilter,andsumsitsoutputs.Eachpathemploysafrequencies.Forexample,[5]reportsaQof12for180-pHdedicated30-GHzoscillatorandis
4、fabricatedin90-nmCMOSinductorsat60GHzand[6]aQof17for400-pHinductorsattechnology.Thereceiverachievesanoisefigureof5.77.1dBand50GHz.Thedivisionanddistributionofthe60-GHzLOalsogain/phasemismatchof1.1dB/2.1whileconsuming36mW.Thetransmitterproducesamaximumoutputlevelof7.2dBmandposecriticalch
5、allenges[3].animagerejectionof20dBwhiledrawing78mW.Toamelioratethesedifficulties,adirect-conversionreceiverIndexTerms—Half-RFarchitecture,low-noiseamplifier,canemploya30-GHzLOandafrequencydoubler[Fig.1(b)].mm-wavetransceiver,polyphasefilter,quadratureLO,synthe-Whilesimplifyingthetaskofdiv
6、ision,thisapproachsufferssizer,mixer,transceiverarchitecture.fromotherdrawbacks:1)CMOSdoublerstendtobequitelossyatthesefrequencies,raisingtheLOnoisefloor,necessitatingpost-amplificationtoachievesufficientswings,andconsumingI.INTRODUCTIONadditionalinductors;2)typicaldoublertopologiesdonotp
7、ro-ECENTdevelopmentsinmillimeter-waveCMOSsys-ducequadratureoutputs,callingforadditional(lossy)quadra-Rtemshavebeguntoaddresstheintegrationofbuildingtureseparationstages;and3)thedistributionofthe60-GHzblockstoformtransceivers[1][4].Inadditiontogenericchal-quadraturephasesaroundlargela
