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1、ABSTRACTABSTRACTUniversalasynchronousreceiver/transmitter,commonlyreferredtoasUART,whichmakeuseoftheserialdatabus,asanasynchronousreceiverandtransmitter,wasusedforcommunicationbetweentheasynchronoussystem.Thebusisbidirectionalcommunication,whichcanrealizefull-duplexdata
2、transmission.TheUARTwaswidelyusedinthecomputers、industrialcontrolandothercommunicationsystemsbecauseoftheadvantagesoflesstransmissionwire、thetransmissiondistance、higherreliabilityandthelowercost.Thenewgenerationcomputersystemwithahigh-endprocessors,whichgreatlyenhanceth
3、espeedofdataprocessing,canhandlealargenumberoftasksinashorttime.Theoperatingvoltageoftheseprocessorsistypically3.3V、2.5Vor1.8V.Therefor,theUARTconnectedwithCPUmustbeimprovedtofurtherreducetheoverheadofCPU,andpromotetheperformanceofoverallsystem.Todesignahigh-performance
4、,theindexesofbaudrate、thedepthofFIFO、voltageandpowerconsumptionmustbeconsidered.ThispaperdesignedadualchannelUARTwhichbaudratecanbeupto5Mbps,basedonthestructureoflowresolutionofclockproportion,withthesupportofSMIC0.13μmCMOSprocess,whichsupplyvoltageofPADandcorewas3.3V、1
5、.8V.Thelowresolutionofclockproportion,whichreplacetheintergerfrequencydivisionwiththerationalfrequencydivision,canbroadenthescopeofthebaudratelargely,andimprovethetransimissionaccuracyandperformanceofUART.Inthemeantime,thestructureofmulti-channelcanmakesmultiplechannels
6、endandreceivedataatthesametime,whichimprovethespeedofdatatransmissiongreatly.InordertoreducetheoverheadofCPU,thispaperdesignedaFIFOwhichdepthwas64byteforeachreceiverandtransimitter,anditcanrealizeblocktransmissionwiththecooperationofDMAoperation.Meanwhile,thispaperprese
7、ntsainterruptmodewhichcontainsfourlevelinterruptions,includingsendinginterruption、receiverinterruption、receivinglinestateinterruptionandMODEMinterruption,theinterruptmodereducesthenumberofvisitsgreatly,sothattheCPUcanhandlemoretasks.Inordertofacilitatedebuggingandimplem
8、entedfunctionofdiagnosticonchip,thispaperalsodesignedthewritebackmode.Inaddition,thispaperalsodesigned14intera