数字电路英文版 第八单元

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1、CHAPTER8FLIP-FLOPSANDRELATEDEDVICESAstable(非稳态的)Hold-time(保持时间)Asynchronous(异步)Bistable(双稳态)Clear(清零)Dflip-flop(D触发器)Edge-triggeredflip-flop(边沿触发器)Feed-back(反馈)Hysteresis(迟滞)J-Kflip-flop(J—K触发器)Latch(锁存器)Master-slaveflip-flop(主从触发器)Monostable(单稳态)One-shot(单稳)Preset(预置1)RESET(置0)SET(

2、置1)Set-uptime(设置时间)S-Rflip-flop(R—S触发器)Synchronous(同步)Timer(计时器)Toggle(触发,计数)KEYTERMSAstableHavingnostablestate.Anastablemultivibratoroscillatesbetweentwoquasistablestates.AsynchronousHavingnofixedtimerelationship.BistableHavingtwostablestates.Flip-flopsandlatchesarebistablemultivib

3、rators.ClearAnasynchronousinputusedtoresetaflip-flop(maketheQoutput0).Dflip-flopAtypeofbistablemultivibratorinwhichtheoutputassumesthestateoftheDinputonthetriggeringedgeofaclockpulse.Edge-triggeredflip-flopAtypeofflip-flopinwhichthedataareenteredandappearontheoutputonthesameclockedg

4、e.FeedbackTheoutputvoltageoraportionofitthatisconnectedbacktotheinputofacircuit.HoldtimeThetimeintervalrequiredforthecontrollevelstoremainontheinputstoaflip-flopafterthetriggeringedgeoftheclockinordertoreliablyactivatethedevice.LatchAbistabledigitalcircuitusedforstoringabit.Hystersi

5、sAcharacteristicofathreshold-triggeredcircuit,suchastheSchmitttrigger,wherethedeviceturnsonandoffatdifferentinputlevels.J-Kflip-flopAtypeofflip-flopthatcanoperateintheSET,RESET,no-change,andtogglemodes.Master-slaveflip-flopAtypeofflip-flopinwhichtheinputdataareenteredintothedeviceon

6、theleadingedgesofclockpulsesandapperattheoutputontrailingedges.Master-slaveflip-flopshave,forthemostpart,beenreplacedbyedge-triggeredtypes.MonostableHavingonlyonestablestate.Amonostablemultivibrator,commonlycalledaone-shot,producesasinglepulseinresponsetoatriggeringinput.One-shotAmo

7、nostablemultivibrator.PresetAnasynchronousinputusedtosetaflip-flop(maketheQoutput1).RESETThestateofaflip-floporlatchwhentheoutputis0;theactionofproducingaRESETstate.SETThestateofaflip-floporlatchwhentheoutputis1;theactionofproducingaSETstate.Set-uptimeThetimeintervalrequiredfortheco

8、ntrollevelstobeonth