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1、状态机实现16位乘法器一：状态机实现16位乘法器的源程序:modulefsm_mult16(mux,pmux,clk,reset,out,mid,done);input[15:0]mux,pmux;inputclk,reset;output[31:0]out,mid;outputdone;reg[31:0]out,mid;regdone;integercount;reg[1:0]pstate,nstate;parameteridle=2'b00,add=2'b01,shift=2'b10;always@(posedgeclk)if(!re
2、set)beginpstate<=idle;endelsebeginpstate<=nstate;endalways@(pstateorreset)beginnstate=idle;case(pstate)idle:beginout=0;done=0;count=0;mid[15:0]=mux;mid[31:16]=16'b0;nstate=add;endadd:beginif(pmux[count])out=out+mid;nstate=shift;endshift:begincount=count+1;mid={mid[30:0],1
3、'b0};if(count==16)beginnstate=idle;done=1;endelsenstate=add;enddefault:nstate=idle;endcaseendendmodule二：状态机实现16位乘法器的测试代码：`timescale1ns/1ns`include"fsm_mult16.v"modulefsm_mult16_test;regclk,reset;reg[15:0]mux,pmux;wire[31:0]out;wiredone;wire[31:0]mid;fsm_mult16mod1(mux,pmu
4、x,clk,reset,out,mid,done);initialbeginclk=0;reset=0;mux=16'b1101_0101_0101_0101;pmux=16'b1111_1111_1111_1111;#5reset=1;#1000$finish;endalways#10clk=~clk;initial$monitor($time,,,"%d*%d=%d",mux,pmux,out);endmodule三：Transcript显示结果：#ReadingD:/altera/91/modelsim_ase/tcl/vsim/p
5、ref.tcl#Loadingprojectmuit16vsimwork.fsm_mult16_test#vsimwork.fsm_mult16_test#Loadingwork.fsm_mult16_test#Loadingwork.fsm_mult16addwavesim:/fsm_mult16_test/*run-all#054613*65535=x#1054613*65535=0#3054613*65535=54613#7054613*65535=163839#11054613*65535=382291#15054613*6553
6、5=819195#19054613*65535=1693003#23054613*65535=3440619#27054613*65535=6935851#31054613*65535=13926315#35054613*65535=27907243#39054613*65535=55869099#43054613*65535=111792811#47054613*65535=223640235#51054613*65535=447335083#55054613*65535=894724779#59054613*65535=1789504
7、171#63054613*65535=3579062955#67054613*65535=0#69054613*65535=54613#73054613*65535=163839#77054613*65535=382291#81054613*65535=819195#85054613*65535=1693003#89054613*65535=3440619#93054613*65535=6935851#97054613*65535=13926315#**Note:$finish:E:/muit16/fsm_mult16_test.v(17
8、)#Time:1005nsIteration:0Instance:/fsm_mult16_test#1#BreakinModulefsm_mult16_testatE:/muit16/fsm_
