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时间:2019-02-28
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1、Experiment9CombinatorialLogicCircuitsIObjectives1Tounderstandtheconfigurationsofintegratedcircuits;2ToverifythelogicfunctionsofTTL,CMOSintegratedcircuits;3Tounderstandthelogicfunctionsoffull-adderandhalf-adderandknowhowtoimplementbylogicelements;4Toholdthemetho
2、dsofdesigningandimplementingcombinatoriallogiccircuits.IIApparatusandEquipmentsNameSpec.Number1DCsource12analogexperimentsystemMES-Ⅳ13Multi-meter14Integratedcircuits4×twoinputs“NAND”gate74LS00154×twoinputs“NOR”gate74LS0216Doublefour-inputs“NAND”gate74LS20174×tw
3、oinputs“AND”gate74LS08186×inverter74LS04194×twoinputs“OR”gate74LS321104×twoinputs“exclusive-OR”gate74LS86111Doublefour-inputs“NOR”gateCD40021IIIPrincipleoftheExperiment1Tostudytheconfigurationsofthechips;2Tofillinthevacancies1)Theoperationvoltageofthe74LSTTLint
4、egratedcircuit(),thelogichighlevelofvoltage1is()volts,thelogiclowlevelofvoltage0is()volts;2)Ifthereisnoinputsignal,TTLgatecircuitcanberegardedas();anditcanberegardedas()whenitispulledoutfromorinsertedintoslots.·6·3)CMOSintegratedcircuits:A.thevoltagerangeofCD40
5、00seriesis();B.thevoltagerangeofCD000seriesis();3Todesignavote-circuitwiththreeinputsandoneoutput,ofwhichtheoutputfollowsthemostofinputs:1)ListthelogictableandgivethesimplestlogicexpressionswithAND-ORgates;2)Implementthecircuitwiththegivenchipsanddrawthelogicdi
6、agram(thechipsandgatesarelimitedtoleast);3)Verifythefunctionanddrawthestate-table;4Todesignahalf-adder(therequirementsshouldbesameasthatofprocedure“3”);5Todesignafull-adderTodesignahalf-adder(therequirementsshouldbesameasthatofprocedure“3”);6Todesignalogicanswe
7、r-circuit:threeinputsareA,B,andC;threeoutputsare,,and;andthelogicrelationshipare=A··,=B··,and=C··inputsoutputsABC100100010010001001·6·IVLabWork1LogicfunctionsverificationofTLLgatecircuits;2LogicfunctionsverificationofCMOSgatecircuits;3Logicfunctionstestoflogicv
8、ote-circuit;4Logicfunctionsverificationofthehalf-adder&full-adder;5Logicfunctionsverificationoflogicanswer-circuit.VRequirementsoftheExperimentReport1Fillinginthetables,veri
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