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ID:3157005
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页数:10页
时间:2017-11-20
《用verilog编写fpga的vga显示》由会员上传分享,免费在线阅读,更多相关内容在学术论文-天天文库。
1、用verilog编写fpga的vga显示(z)VGA工业标准是640x480x60Hz,主要有5个信号,即三个颜色信号R/G/B、行同步信号HS和场同步信号VS。它是从左上角开始一行接一行的扫描,扫描完一屏后又回到左上角扫描。标准要求是场频59.94Hz,行频31469Hz,时钟频率25.175MHz这是Altera的DE2开发板上自带的演示程序。可以先搜一下VGA工业标准的时序图,再看这个代码就会很简单,就不注释了。弄清楚行同步、场同步、前肩、后肩,一切都easymoduleVGA_Controller(//HostSide
2、iRed,iGreen,iBlue,oRequest,//VGASideoVGA_R,oVGA_G,oVGA_B,oVGA_H_SYNC,oVGA_V_SYNC,oVGA_SYNC,oVGA_BLANK,oVGA_CLOCK,//ControlSignaliCLK,iRST_N);`include"VGA_Param.h"//HostSideinput[9:0]iRed;input[9:0]iGreen;input[9:0]iBlue;outputregoRequest;//VGASideoutput[9:0]oVGA_R;o
3、utput[9:0]oVGA_G;output[9:0]oVGA_B;outputregoVGA_H_SYNC;outputregoVGA_V_SYNC;outputoVGA_SYNC;outputoVGA_BLANK;outputoVGA_CLOCK;//ControlSignalinputiCLK;inputiRST_N;//InternalRegistersandWiresreg[9:0]H_Cont;reg[9:0]V_Cont;reg[9:0]Cur_Color_R;reg[9:0]Cur_Color_G;reg[9
4、:0]Cur_Color_B;wiremCursor_EN;wiremRed_EN;wiremGreen_EN;wiremBlue_EN;assignoVGA_BLANK=oVGA_H_SYNC&oVGA_V_SYNC;assignoVGA_SYNC=1'b0;assignoVGA_CLOCK=iCLK;assignoVGA_R=(H_Cont>=X_START&&H_Cont=Y_START&&V_Cont5、gnoVGA_G=(H_Cont>=X_START&&H_Cont=Y_START&&V_Cont=X_START&&H_Cont=Y_START&&V_Cont6、gedgeiRST_N)beginif(!iRST_N)oRequest<=0;elsebeginif(H_Cont>=X_START-2&&H_Cont=Y_START&&V_Cont7、ginH_Cont<=0;oVGA_H_SYNC<=0;endelsebegin//H_SyncCounterif(H_Cont8、beginV_Cont<=0;oVGA_V_SYNC<=0;endelsebegin//WhenH_SyncRe-startif(H_Cont==0)begin//V_SyncCounterif(V_Cont
5、gnoVGA_G=(H_Cont>=X_START&&H_Cont=Y_START&&V_Cont=X_START&&H_Cont=Y_START&&V_Cont6、gedgeiRST_N)beginif(!iRST_N)oRequest<=0;elsebeginif(H_Cont>=X_START-2&&H_Cont=Y_START&&V_Cont7、ginH_Cont<=0;oVGA_H_SYNC<=0;endelsebegin//H_SyncCounterif(H_Cont8、beginV_Cont<=0;oVGA_V_SYNC<=0;endelsebegin//WhenH_SyncRe-startif(H_Cont==0)begin//V_SyncCounterif(V_Cont
6、gedgeiRST_N)beginif(!iRST_N)oRequest<=0;elsebeginif(H_Cont>=X_START-2&&H_Cont=Y_START&&V_Cont7、ginH_Cont<=0;oVGA_H_SYNC<=0;endelsebegin//H_SyncCounterif(H_Cont8、beginV_Cont<=0;oVGA_V_SYNC<=0;endelsebegin//WhenH_SyncRe-startif(H_Cont==0)begin//V_SyncCounterif(V_Cont
7、ginH_Cont<=0;oVGA_H_SYNC<=0;endelsebegin//H_SyncCounterif(H_Cont8、beginV_Cont<=0;oVGA_V_SYNC<=0;endelsebegin//WhenH_SyncRe-startif(H_Cont==0)begin//V_SyncCounterif(V_Cont
8、beginV_Cont<=0;oVGA_V_SYNC<=0;endelsebegin//WhenH_SyncRe-startif(H_Cont==0)begin//V_SyncCounterif(V_Cont
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