微电子工艺c08nwspdm01

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1、WuxiMicroelectronicsInstitute0.8umSi-GateCMOSProcessVersion#:C08NWSPDM01WuxiMicroelectronicsInstitute无锡微电子中心第二研究室(中微晶园有限公司)设计规则（工艺接口文件之一）Tel:0510-5807123-2205Fax:0510-5807123-3515Page12WuxiMicroelectronicsInstitute0.8umSi-GateCMOSProcessVersion#:C08NWSPDM010.8umSi-GateCMOSSinglePo

2、lyDoubleMetalProcessOutline:lProcessFeatureslMaskingLayersandProcessBiaslSchematicofProcessFlowlDesignRuleslPCMSpecificationlSPICEParametersIssuedby：XiaozhiqiangCheckedby：GaofengApprovedby：XuzhengPage12WuxiMicroelectronicsInstitute0.8umSi-GateCMOSProcessVersion#:C08NWSPDM010.8umSi

3、-GateCMOSProcessWaferStartPSubstrate14-25ohm-cmWellFormationNwellXj=3.0umIsolationFormationLocos:BirdsBeak=0.3um/sideTransistorGox=17.5nmN-ChannelNLDD,P-ChannelPLDDXjN+=0.25umXjP+=0.35umILDTEOS/BPTEOS200nm/600nmMetal1AlSiCu550nmIMDTEOS/EB/TEOStotal:1200nmMetal2AlSiCu1100nmPassivat

4、ionTEOS/PESIN200nm/1000nmPage12WuxiMicroelectronicsInstitute0.8umSi-GateCMOSProcessVersion#:C08NWSPDM010.8umSiGateCMOSSPDMMaskingLayersNo.ProcessSequenceMaskNameDigitizedTone1.Nwell11Clean2.Island20Dark3.N-chField31Dark4.Poly51Dark5.N+S/D61Clean6.P+S/D62Clean7.Contact71Clean8.Meta

5、l181Dark9.Via72Clean10.Metal282Dark11.PAD90CleanPage12WuxiMicroelectronicsInstitute0.8umSi-GateCMOSProcessVersion#:C08NWSPDM010.8umSiGateCMOSSPDMProcessBiasNo.ProcessSequenceBias/Side1Nwell0.0um2Island-0.3um3N-chField0.0um4Poly0.025um5N+S/D0.0um6P+S/D0.0um7Contact0.0um8Metal1-0.1u

6、m9Via0.0um10Metal2-0.1um11PAD0.0umDefinedonBirdsBeakPage12WuxiMicroelectronicsInstitute0.8umSi-GateCMOSProcessVersion#:C08NWSPDM010.8umSi-GateCMOSDesignRule注：以下尺寸皆为最终尺寸Layer11N-wellDimension11.1N-welltoN-wellspacing(samepotential)1.811.2N-welltoN-wellspacing(differentpotential)5.0

7、11.3MinimumN-wellwidth4.011.4N+islandtoN-welledge(InsideP-well)3.511.5P+islandtoN-welledge(insideN-well)3.311.6N+welltabtoP-welledge0.811.7P+welltabtoP-welledge1.0Layer12P-wellGeneratefromp-wellLayer20IslandDimension20.1Minimumislandwidth1.020.2Minimumislandspacing1.520.3Islandtod

8、ieboundary20.0Layer31Fieldimplant