复旦半导体工艺教材课件.ppt

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1、Chapter3CMOSProcessTechnologyOutlineEvolutionofSiMOSFETSisubstrateselectionforMOSdevicesBasicstructureandadvantageofCMOSFormationoftwotypesMOSFETsonthesameSisubstrateCMOSDeviceisolationAtypicalCMOSfabricationprocessflowLatch-upeffectinCMOSdevicesSub-micronCMOSdeviceengineerin

2、goptimizationWellengineeringChannelengineeringSource/draindopingengineeringSalicide(Self-alignedsilicide)processengineeringI.EvolutionofSiMOSFET(MISFET,IGFET)DiscoveryofMOStransistor(1928-1960)IdeaofJ.Lilienfeldandhispatent:“Deviceforcontrollingelectriccurrent”(Filed-March25,

3、1928;patentissued-march7,1933)MISFETstructureofLilienfeld:Al/Al2O3/CuSSubstrate:CuS(semiconductor)Dielectricgate:Al2O3(10-4mm)Gateelectrode:Al(100V)Electricfield:100V/10-4mm=107V/cm(ClosetothepresentSiMOSFET!)FirstSiMOSFETwasbuiltin1960byKahngandAttala(BellLab.)CuSSGDAl2O3Al1

4、960-1970:BasicmaterialandprocessR&DdevelopedforMOStechnology1961MOSC-Vtechnique(byTermanandMoll)1962PMOS(FSC);NMOS(RCA)1963CMOS(F.Wanlass&C.T.Sah(萨支唐)ofFSC)1966The1stCMOSICswerefabricatedSiO2/Siinterfacestudy,mobileioncontrol,…1970-2006rapidgrowthofMOStechnologyandindustryfro

5、mSSItoVLSI/ULSI/SoCMainrequirementsofMOSFETforICStableanduniformthresholdvoltage(VT)Largeandstabledrivingcurrent(ID)-highsurfacecarriermobilityLowleakage/sub-thresholdcurrentLargetransconductance(gm=dID/dVG)Highswitchingspeed/lowRCproductLong-termreliabilityLowvoltage,lowpowe

6、roperationII.SisubstrateselectionforMOSdevicesWaferorientation:Si(100)LowinterfacetrapdensityNit(111)/Nit(100)10HighersurfacecarriermobilityS(100)>S(111)DopinglevelForlowerS/Dtosubstratecapacitance(CSB,CDB)LightdopingispreferredTopreventpunch-throughproblemWidthofthePNjun

7、ctiondepletionregionSi—DielectricconstantofSi(11.9)0—Freespacepermittivity(8.85·10-14F/cm)Vbi—Built-involtage:Vbi=0.56+KT/qln(NA/ni)V—Reversebias(<0)NB—SubstratedopingconcentrationIfWdLg(channellength)punch-throughThepunch-throughvoltage:VPTLg2qNB/2Si0Substratedopingl

8、evelshouldbeselectedproperlyforoptimizationCompromiseUsingepitaxialm