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1、MIPIProtocolIntroductionMIPIDevelopmentTeam2010-9-2WhatisMIPI?MIPIstandsforMobileIndustryProcessorInterfaceMIPIAllianceisacollaborationofmobileindustryleaders.Objectivetopromoteopenstandardsforinterfacestomobileapplicationprocessors.Intendstospeeddeploymentofne
2、wservicestomobileusersbyestablishingSpec.BoardMembersinMIPIAllianceIntel,Motorola,Nokia,NXP,Samsung,ST,TIWhatisMIPI?MIPIAllianceSpecificationfordisplayDCS(DisplayCommandSet)DCSisastandardizedcommandsetintendedforcommandmodedisplaymodules.DBI,DPI(DisplayBusInter
3、face,DisplayPixelInterface)DBI：Parallelinterfacestodisplaymoduleshavingdisplaycontrollersandframebuffers.DPI：Parallelinterfacestodisplaymoduleswithouton-paneldisplaycontrollerorframebuffer.DSI,CSI(DisplaySerialInterface,CameraSerialInterface)DSIspecifiesahigh-s
4、peedserialinterfacebetweenahostprocessoranddisplaymodule.CSIspecifiesahigh-speedserialinterfacebetweenahostprocessorandcameramodule.D-PHYD-PHYprovidesthephysicallayerdefinitionforDSIandCSI.DSILayersDCSspecDSIspecD-PHYspecOutlineD-PHYIntroductionLaneModule,State
5、andLinelevelsOperatingModesEscapeModeSystemPowerStatesElectricalCharacteristicsSummaryIntroductionforD-PHYD-PHYdescribesasourcesynchronous,highspeed,lowpower,lowcostPHYAPHYconfigurationcontainsAClockLaneOneormoreDataLanesThreemainlanetypesUnidirectionalClockLan
6、eUnidirectionalDataLaneBi-directionalDataLaneTransmissionModeLow-Powersignalingmodeforcontrolpurpose：10MHz(max)High-Speedsignalingmodeforfast-datatraffic：80Mbps~1GbpsperLaneD-PHYlow-levelprotocolspecifiesaminimumdataunitofonebyteAtransmittershallsenddataLSBfirs
7、t,MSBlast.D-PHYsuitedformobileapplicationsDSI：DisplaySerialInterfaceAclocklane,Onetofourdatalanes.CSI：CameraSerialInterfaceTwoDataLanePHYConfigurationLaneModulePHYconsistsofD-PHY(LaneModule)D-PHYmaycontainLow-PowerTransmitter(LP-TX)Low-PowerReceiver(LP-RX)High-
8、SpeedTransmitter(HS-TX)High-SpeedReceiver(HS-RX)Low-PowerContentionDetector(LP-CD)ThreemainlanetypesUnidirectionalClockLaneMaster：HS-TX,LP-TXSlave：HS-RX,LP-RXUnidirectionalD
