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1、CodeCoverageCharacterCodecoverageisgoodatshowinguswhat’snotbeentested.Codecoveragedoesnottesttheactualintentofthedesign,Codecoveragecan’ttestlogicwhichismissing,Codecoverageispurelymechanical,soresultsarenotpronetohumanerror.Codecoveragesays“beenther
2、e”,butnotnecessarily“donethat”.FunctionalCoverageCharacterFunctionalcoveragefocusesonthefunctionalaspectsofadesignHelpdesigneridentifyuncoveredfunctionsofthedesignPALsupportfunctionalcoverageonincisiveplatformReallyTestFunctionalityOverview(WhatisPSL
3、)PSL–PropertySpecificationLanguageAssertion-basedVerificationLanguageEasytocapturespec,requirementandassumptionsSupportVerilog,VHDL,SystemCFullySupportedbyCadenceTools(NCsim,Incisive)FormatinVHDLTheassertionmustbeacomment,delimitedwiththe‘--’characte
4、rs.Eachassertionmuststartwiththe‘psl’keyword.Eachassertionmustendwithasemicolon‘;’.TheassertionmustbeplacedwithinVHDLarchitecture.TheHDLsignalsusedbytheassertionmustbedefined.Assertionscannotbeplacedinsideoffunctionsorprocedures.AllofthePSLkeywords,s
5、uchaspsl,mustbelowercase.StartwithSimpleExample--pslcheck:assertalways(state_bits=state1)->--next(state_bits=state2)@(rising_edge(clk))--pslLabel:statementkeyword(assert,cover)propertykeyword(always,never…)expressionUsingPropertyKeywordsandOperatorsa
6、lwaysexpr1--->expr1mustbetrueatalltimeseventually!expr1--->expr1mustbetrueatthecurrentcycleorsomefuturecycleneverexpr1--->expr1mustbefalseatalltimesnextexpr1--->expr1mustbetrueinthenextcycle,whichisnotnecessarilythenextclockcycle.expr1untilexpr2--->e
7、xpr1mustbetrueuntilexpr2becomestrueexpr1until_expr2--->expr1mustbetrueuntilandincludingthecyclewhereexpr2becomestrueexpr1[*n]--->expr1shouldberepeatsfornconsecutivecyclesexpr1[=n]--->expr1shouldberepeatsforncycles,notnecessarilyConsecutive.property1-
8、>property2--->property2mustbetrueineverycycleinwhichproperty1istrueproperty1
9、->property2--->property2mustbetrueinthelastcycleofproperty1property1
10、=>property2--->property2mustbetrueinthefirstcycleafterproperty1PSLDemowithFIFOModules(1)DesignRequiremen
