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《verilog自动手动换挡频率计.docx》由会员上传分享，免费在线阅读，更多相关内容在行业资料-天天文库。
1、直接上源码，不解释，自己建工程运行即可看到功能！modulecontrol(cp1024hz,started,reset,k1,k2,k3,k4,k5,k6,zero1,zero2,zero3,zero4,zero5,zero6,time_out,mode,flag_pressed,sound_en,latch_en);//yesdinputcp1024hz,started,reset;inputk1,k2,k3,k4,k5,k6;//抢答的6个按键，由cp1024hz扫描是否有按键inputzero1,zero2,zero3,zero4,zero5,zer
2、o6;//6个用?的分数是否为0，并将分数为0的淘汰inputtime_out;//倒计时已完outputflag_pressed,sound_en,latch_en,mode;//是否已按键;声音控制;模式控制;输出模式regflag_pressed,sound_en,latch_en;reg[3:0]mode;always@(posedgecp1024hz)beginif(!started)//当started=0时，对系统进行初始化，同时将mode置0；beginmode<=0;flag_pressed<=1;//利用设置这个将k1~k6屏蔽sound
3、_en<=0;latch_en<=0;endelsebeginif(reset)//started=1已开始，reset=1新一轮抢答beginflag_pressed<=0;sound_en<=0;latch_en<=0;mode<=7;//mode置为抢答模式endelsebeginif(time_out)beginsound_en<=1;//时间完了之后，响声提示endelsebeginif(!flag_pressed&&k1&&!zero1)//当started=1时，按下key1beginflag_pressed<=1;sound_en<=1;la
4、tch_en<=1;//按键之后，产生相应电平mode<=1;endelseif(started&&!flag_pressed&&k2&&!zero2)beginflag_pressed<=1;sound_en<=1;latch_en<=1;//按键之后，产生相应电平mode<=2;endelseif(!flag_pressed&&k3&&!zero3)beginflag_pressed<=1;sound_en<=1;latch_en<=1;//按键之后，产生相应电平mode<=3;endelseif(!flag_pressed&&k4&&!zero4)be
5、ginflag_pressed<=1;sound_en<=1;latch_en<=1;//按键之后，产生相应电平mode<=4;endelseif(!flag_pressed&&k5&&!zero5)beginflag_pressed<=1;sound_en<=1;latch_en<=1;//按键之后，产生相应电平mode<=5;endelseif(!flag_pressed&&k6&&!zero6)beginflag_pressed<=1;sound_en<=1;latch_en<=1;//按键之后，产生相应电平mode<=6;endendendenden
6、dendmodulemoduledisplay(cp1024hz,mode,setted_score,score1,score2,score3,score4,score5,score6,time_countdown,disp);//yesdinputcp1024hz;input[3:0]mode,time_countdown;//从time_count引出input[7:0]setted_score,score1,score2,score3,score4,score5,score6;outputdisp;reg[3:0]mode_disp;reg[7:0]d
7、isp;always@(posedgecp1024hz)begincase(mode)4'b0000:disp<=setted_score;4'b0001:disp<=score1;4'b0010:disp<=score2;4'b0011:disp<=score3;4'b0100:disp<=score4;4'b0101:disp<=score5;4'b0110:disp<=score6;4'b0111:begindisp[3:0]<=time_countdown;disp[7:4]<=0;enddefault:disp<=setted_score;endc
8、aseendendmodulemodulemode_
