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1、spi四种模式SPI的相位(CPHA)和极性(CPOL)分别可以为0或1，对应的4种组合构成了SPI的4种模式(mode)Mode0CPOL=0,CPHA=0 Mode1CPOL=0,CPHA=1Mode2CPOL=1,CPHA=0 Mode3CPOL=1,CPHA=1时钟极性CPOL:即SPI空闲时，时钟信号SCLK的电平（1:空闲时高电平;0:空闲时低电平）时钟相位CPHA:即SPI在SCLK第几个边沿开始采样（0:第一个边沿开始;1:第二个边沿开始）sd卡地spi常用的是mode0和mode3，这两种
2、模式的相同的地方是都在时钟上升沿采样传输数据，区别这两种方式的简单方法就是看空闲时，时钟的电平状态，低电平为mode0，高电平为mode3。OverviewTheSPIstandardincludesfourmodes,definedbythepolarityofSCLKandthephaserelationshipbetweendataandSCLK.Theclockpolarity(CPOL)isdeterminedbytheidlestateofSCLK.Iftheidlestateislow,CPO
3、Lis0.Iftheidlestateishigh,CPOLis1.Theclockphase(CPHA)isdeterminedbywhichedgethatdataisvalid.IfthedataisvalidonthefirstedgeofSCLK,CPHAis0.IfthedataisvalidonthesecondedgeofSCLK,CPHAis1.IndustryhastwocommonformatstodefinethefourSPImodes.Thefirstformatdefinest
4、hefourpossiblecombinationsofphaseandpolarityasmode0,mode1,mode2,andmode3.Thesecondformatdefinesthecombinationsasmode0,0,mode0,1,mode1,0,andmode1,1.TheSPImastermustuseamodesupportedbytheslavedevicetoallowpropercommunications.DallasSemiconductor/Maxim'sSPI-i
5、nterfaceRTCssupportbothSCLKpolarities.TheRTCautomaticallydeterminesthepolaritybydetectingtheidlestateofSCLKwhenCEisasserted.Themastermust,therefore,placeSCLKintheproperidlestatebeforeCEisasserted.Onlyonephaseissupported.SincetwoSCLKpolaritiesaresupported,t
6、woofthefourSPImodesaresupportedbytheRTCs:modes1and3(mode0,1andmode1,1).Onmicrocontrollerswithbuilt-inSPIinterfaces,anSPIcontrolorconfigurationregisterwillhavebitsthatcontrolthepolarityandphase.BecausetheRTCsupportseitherpolarity,thepolaritycanbesetasdesire
7、d.Thephasebit,however,mustbesetproperly,ortheRTCwillnotoperatecorrectly.Figure1showsatypicalsingle-bytereadandFigure2showsatypicalsingle-bytewrite.EachtimeCEisasserted,thefirsteightSCLKpulsesareusedtoclockinacommandbyte.Thecommandbyteconsistsofseveralbitst
8、hatdefinearegisteraddress,andonebitthatdefinesthedatadirection:awriteifthenexteightSCLKpulseswillclockdataintothepart,orareadifdataisclockedoutofthepart.AdditionalgroupsofeightSCLKpulsescontinuetotransferdata
