计算器参考程序

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1、vcrilog设计的xilinxSpartan-3.h实现的十进制数加减乘除计算器代码要求:Implementadecimalcalculator,operateaddition,subtraction,multiplicationanddivisionfortwo16bitsnumbersanddisplaytheresultsin7-segmentLEDdisplay.Usingdecimalnumbersastheinputs/outputs.Eachinputis4decimals(16bits).Displayanerrormessage(ERR)whenthedivis

2、oris0.Pleasemakeyourownuserinteractdesigntocontrolthecalculationoperation,todisplaytheoperationresults,andprovidetheclearusermanual.BuildBehavioralSimulationandsubmitthesimulationresults.如果有错误请发正确代码到zjuwh@sina.on,谢谢。modulecaculator(elk,btn_inzswzled,digit_anode,segment);inputelk;input[3:0]sw;i

3、nput[3:0]btn_in;output[3:0]digit_anode;output[7:0]segment;wireclk_lms;wire[3:0]btn_in;wire[3:0]wire[7:0]segment;reg[15:0]disp_num=16zbO;wire[3:0]btn_out;reg[7:0]A,B;initialbeginA<=8,b0000_0000;B<=8fb0000_0000;endalways^(negedgesw[3])beginA<=8^b00000000;B<=8zb00000000;endcalca(A,B,sw[2:0],disp_

4、num);Timer_lms12(elk,clk_lms);anti_jitterII(elk,clk_lms,btn_in,btn_out);always^(posedgebtn_out[0])B[3:0]<=4^0000;endalways®(posedgebtn_out[1])B[7:4]<=4zbOOOO;endalways^(posedgebtn_out[2])A[3:0]<=4zbOOOO;endalways^(posedgebtn_out[3])A[7:4]<=4zbOOOO;endbeginB[3:0]<=B[3:0]beginB[7:4]<=B[7:4]begin

5、A[3:0]<=A[3:0]4fdl;4fdl;beginA[7:4]<=A[7:4]+41dl;if(B[3:0]>4zd9)if(B[7:4])>4zd9)if(A[3:0]>4zd9)if(A[7:4]>4'd9)displayDISPLAY_0(elk,disp_num,digit_anode,segment);endendmodulemodulecal(A,Bzswzresult);input[7:0]A；input[7:0]B；input[2:0]SW；output[15:0]result;reg[15:0]result=l6ZbO;reg[15:0]t=16zb0;r

6、eg[7:0]a,b;a=A[7:4]*4zdl0+A[3:0];b=B[7:4]*4ZdlO+B[3:0];always®(sw[2:0]oraorb)begincase(sw[2:0])000:beginresult={A，B};end001:begint=a+b;tobed(t,result);end010:beginif(a

7、It);end100:beginif(b!=0)begint=a/b;tobed(tzresult);endelseresult=16’bxxxxl01111001100;enddefault:result=0;endcaseendendmodulemoduletobed(in,result);input[15:0]in;output[15:0]result;reg[15:0]result;result[3:0]=in%4zdl0;result[7:4]=(in/4z