Implementing PCI Express on QorIQ Processors

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1、TMFreescalePowerQUICC/QorIQPCIExpressConfigurationandDebugTipsRichardNieFreescaleSemiconductorMichaelLeungFutureElectronicsNovember9,2010MarketSolutionsSeminar,Ottawa1Agenda•Introduction•TwogroupsofFSLproductsfeaturingdifferentPCIeIPs•Twomodesofoperation–RC

2、andEP•PCIeControllerInitialization•LaneReversal–Useitonlywhenunavoidable!Notforalldevices!•PCIeSerDesReferenceClock–Frequency,Connection•DebugTips–LinkTrainingFailure•DebugTips–Questionstoconsider•Summary•ReferencesTM2TheLegacyPCIBusQuickOverview•Parallelsh

3、aredbus•32-/64-bitmultiplexedbus•Definedinearly1990sCPU(Rev.2.0Specreleasedin1993)LocalBusBridge/MemoryCtrlMemoryPCIBus0BridgePeriphPeriphPCIBus1PeriphPeriphTM3LimitationsofPCIArchitecture•Slowdevicearbitrationconsumedbandwidthduetowaitstateinsertion•Transf

4、ersizeunknown•Delayedtransactionsareinefficient•Retriesuseupbustime•Notransfercount•Busmasterdoesn’tidentifyitself•Interrupthandlingisinefficient•SinceINT#iswiredORtogether,ittakesquitealotoftimetofigureoutwhichdevicecausedinterrupt•Slowclockspeed•Thereflec

5、tionnaturemakesitslow,reachingtheceilinglimitofitsbandwidth•Toincreaseperformance,increasespeedto66MHz,whichlowersloadto1to2slots•Ifyouwanttoconnectmoredevices,youwouldseemoreandmorehub-linkinterface(mostlikely64-bitwidth)onthesystem...causingboardrouting:a

6、headache.•DetectederrorresultsinsystemshutdownTM4PCIExpressArchitectureOverviewCPURCRBMemoryBus#0PCIeRootComplex(RC)VirtualVirtualVirtualPCIPCIPCIBridgeBridgeBridgeBus#1Bus#6Bus#7Bus#2PCIePCIe-PCI/PCI-XBus#3PCIeEndpointBridgeSwitchEndpointBus#8Bus#4Bus#5PCI

7、ePCIeEndpointLegacyEndpointTM5PCIExpressPhysicalLayerTerminology►Link•CollectionoftwoportsandtheirUpstreaminterconnectinglanesDeviceTX0RX0TXnRXnDownstream►LanePNPNPNPNPort•Asetofdifferentialsignalpairs:onepairforTxandanotherforRx.Lane0Lanen►PortLink•Physica

8、lly,agroupoftransmittersChannelandreceiverslocatedonthesame(P-NPair)chipthatdefinealinkUpstreamPNPNPNPNRX0TX0RXnTXnPort•Logically,aninterfacebetweenacomponentandaPCIExpressLinkDownstreamDevice►x1,x2,x4