DDR Advanced Topics

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1、DDRAdvancedTopicsSanDiskInternalWorkshop2012BenChiaSignalIntegrityConsultant7/18/2012HighSpeedDesignCenter©Outline•Terminationtheory•Vref•Single-endedvsDifferentialsignaling•SSLTvsPODL•GDDRandMobilmemorysystems•MarginforHighVolumeProduction•LPDDRandMobileRoadMapHighSpeed2DesignCenter©DDRProtocolHi

2、ghSpeed3DesignCenter©DDR1/2/3ComparisonHighSpeed4DesignCenter©DDR3vsDDR4HighSpeed5DesignCenter©LowPowerDDRHighSpeed6DesignCenter©DDR1TerminationHighSpeed7DesignCenter©DDR2TerminationHighSpeed8DesignCenter©DDR4TerminationsHighSpeed9DesignCenter©SeriesTerminationsHighSpeed10DesignCenter©DifferentPar

3、allelTerminationsHighSpeed11DesignCenter©Ref:DesignCon2012IBMpaperDifferentParallelTerminationsHighSpeed12DesignCenter©Ref:DesignCon2012IBMpaperSignalIntegrityTopics:ODT•DQbushason-die-termination•Advantagescomparetooff-chiptermination–Terminatedclosetothereceiver,nostub–Lowcost,easyPCBdesign–DQti

4、mingmarginisnotsensitivetoODTvariation–Useseparateterminationpowerpintoreducenoisecouplingfromothernoisesource–Terminationvaluesareadjustableforbestpowerconsumption/performancetradeoffHighSpeed13DesignCenter©ODTcomparetoseriestermination•DDRODTtermination–Apull-uporpull-downparalleltermination–Aid

5、ealterminationmethodtoreducereflection–Consumingpowereveninnon-activemode–Apull-uponlyconsumespoweratlowstate•Seriestermination–Cannotremovereflectionfromanopenfarendload–Onlyattenuatesreflection–Signalamplitudeisreducedduetoseriesresistor–Consumingunusedpoweratterminationresistor–Needstobecareful

6、lyselectedandnottoaffectVinthresholdHighSpeed14DesignCenter©SSTL(DDR)andPODL(GDDR4)•SSTLusespullupandpulldowntermination•PODL(Pseudo-Open-DrainLogic)–Onlyhaspull-upterminationtosavepowerathighstate–Pullupdriverisweakertoincreaserisetime–Fasterrisingedgethanfallingedge–Referencevoltagesetupneedstoa

7、ccountforrisingandfallingedgeresponseHighSpeed15DesignCenter©SSTL_1.5I/ODriver1.5v1.5vHighSpeed16DesignCenter©SSONoiseforSSTLDriver(pulldowncase)HighFrequencynoisefromexternalloopstillcanbesignificantHighSpeed17D