3、MStatic/DynamicRandomAccessMemory静/动态可读写存储器RWMRead-writememory读写存储器ATDAddressTransitionDetection地址翻转探测DFTDesign-for-test可侧性设计DUTDeviceundertest被测器件BISTBuiltinselftest内建自测试EDAElectronicDesignAutomation电子设计自动化TSPCRTrueSingle-PhaseClockedTegister真单相钟控寄存器Chapter011.How to evaluate performance•Cost
6、stance=MOSsructureresistance+sourceanddrainresistance+cantactresistance+wiringresistanceWith silicidationR方块is reduced to the range 1 to 4 Ω/方块(sourceanddrainresistance)Chapter041.Cwire= Cpp+ Cfringe+ Cinterwire2.Dealingwithresistance:1)Usebetterinterconnectmaterials2)Moreinterconnectlayers3.
7、RCMode11•Lumped RC model–total wire resistance is lumped into a single R and total capacitance into a single C–good for short wires; pessimistic and inaccurate for long wires•Distributed RC model–circuit parasiticsare distributedalong t